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| author | Akash Goel | 2014-03-25 13:31:50 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-03-28 18:31:59 +0100 |
| commit | 61a563a2a6ada193a022666b51ec8bb64112efc5 (patch) | |
| tree | 167ccdfa76d77034c0d485ed76a7a286e4eade48 /drivers/gpu/drm/i915 | |
| parent | drm/i915: Track the enabled PM interrupts in dev_priv. (diff) | |
| download | kernel-qcow2-linux-61a563a2a6ada193a022666b51ec8bb64112efc5.tar.gz kernel-qcow2-linux-61a563a2a6ada193a022666b51ec8bb64112efc5.tar.xz kernel-qcow2-linux-61a563a2a6ada193a022666b51ec8bb64112efc5.zip | |
drm/i915: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
platforms > Gen6.
VS_TIMER_DISPATCH bit enable was earlier required as a part of
WA 'WaTimedSingleVertexDispatch', which is now applicable only to
platforms < Gen7.
v2: Enhancing the scope of the patch to full Gen7 (Chris)
v3: Modifying the WA condition to the cover the applicable platforms,
and adding the WA name in comments. (Ville)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Sourab Gupta <sourab.gupta@intel.com>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw -Chris
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 4eb3e062b4e3..bfb5d75cc1c5 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -566,7 +566,8 @@ static int init_render_ring(struct intel_ring_buffer *ring) struct drm_i915_private *dev_priv = dev->dev_private; int ret = init_ring_common(ring); - if (INTEL_INFO(dev)->gen > 3) + /* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */ + if (INTEL_INFO(dev)->gen >= 4 && INTEL_INFO(dev)->gen < 7) I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH)); /* We need to disable the AsyncFlip performance optimisations in order |