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| author | Chris Wilson | 2019-01-25 14:22:27 +0100 |
|---|---|---|
| committer | Chris Wilson | 2019-01-25 15:27:21 +0100 |
| commit | fe62365f9f80a1c1d438c54fba21f5108a182de8 (patch) | |
| tree | af83eeae22ab5a5dea2aa4af800c07bf70c75cff /drivers/gpu/drm/i915 | |
| parent | drm/i915: Make all GPU resets atomic (diff) | |
| download | kernel-qcow2-linux-fe62365f9f80a1c1d438c54fba21f5108a182de8.tar.gz kernel-qcow2-linux-fe62365f9f80a1c1d438c54fba21f5108a182de8.tar.xz kernel-qcow2-linux-fe62365f9f80a1c1d438c54fba21f5108a182de8.zip | |
drm/i915/guc: Disable global reset
The guc (and huc) currently inexcruitably depend on struct_mutex for
device reinitialisation from inside the reset, and indeed taking any
mutex here is verboten (as we must be able to reset from underneath any
of our mutexes). That makes recovering the guc unviable without, for
example, reserving contiguous vma space and pages for it to use.
The plan to re-enable global reset for the GuC centres around reusing the
WOPM reserved space at the top of the aperture (that we know we can
populate a contiguous range large enough to dma xfer the fw image).
In the meantime, hopefully no one even notices as the device-reset is
only used as a backup to the per-engine resets for handling GPU hangs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190125132230.22221-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reset.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c index 2f840858572c..33408c4e6358 100644 --- a/drivers/gpu/drm/i915/i915_reset.c +++ b/drivers/gpu/drm/i915/i915_reset.c @@ -574,6 +574,9 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask) bool intel_has_gpu_reset(struct drm_i915_private *i915) { + if (USES_GUC(i915)) + return false; + return intel_get_gpu_reset(i915); } |