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| author | Jeykumar Sankaran | 2019-02-14 02:19:16 +0100 |
|---|---|---|
| committer | Rob Clark | 2019-04-18 19:04:10 +0200 |
| commit | 4e99851742470a64326d5484a44e7940c0e6d056 (patch) | |
| tree | b3b167626c49226443962d4e9d19f185f9262e6c /drivers/gpu/drm/msm/disp/dpu1 | |
| parent | drm/msm/dpu: assign intf to encoder in mode_set (diff) | |
| download | kernel-qcow2-linux-4e99851742470a64326d5484a44e7940c0e6d056.tar.gz kernel-qcow2-linux-4e99851742470a64326d5484a44e7940c0e6d056.tar.xz kernel-qcow2-linux-4e99851742470a64326d5484a44e7940c0e6d056.zip | |
drm/msm/dpu: check split role for single flush
Removing unwanted access of crtc_state for finding this information.
Use split role information to know whether we have slave ctl.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1550107156-17625-8-git-send-email-jsanka@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1')
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 0adfdfc8775f..1b7a335a6140 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -347,22 +347,10 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx) phys_enc); } -static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc) -{ - struct dpu_crtc_state *dpu_cstate; - - if (!phys_enc) - return false; - - dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); - - return dpu_cstate->num_ctls > 1; -} - static bool dpu_encoder_phys_vid_needs_single_flush( struct dpu_encoder_phys *phys_enc) { - return (phys_enc && _dpu_encoder_phys_is_dual_ctl(phys_enc)); + return phys_enc->split_role != ENC_ROLE_SOLO; } static void _dpu_encoder_phys_vid_setup_irq_hw_idx( |