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authorStephane Viau2015-03-13 20:49:34 +0100
committerRob Clark2015-04-02 01:29:34 +0200
commit67ac0a2d6994fef77a611106fa7f6fcc58f4bb8d (patch)
tree187a12bc1a31e23b50863acaa356c230de45015d /drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
parentdrm/msm/mdp5: Add START signal to kick off certain pipelines (diff)
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drm/msm/mdp5: Make the intf connection in config module
Up until now, we assume that eDP is tight to intf_0 and HDMI to intf_3. This information shall actually come from the mdp5_cfg module since it can change from one chip to another. v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit] v3: add sanity check before writing in INTF_TIMING_ENGINE_EN registers Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h')
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
index 69e35aca80a7..12224d777e7b 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
@@ -56,6 +56,8 @@ struct mdp5_smp_block {
int reserved[MAX_CLIENTS]; /* # of MMBs allocated per client */
};
+#define MDP5_INTF_NUM_MAX 5
+
struct mdp5_cfg_hw {
char *name;
@@ -69,6 +71,8 @@ struct mdp5_cfg_hw {
struct mdp5_sub_block ad;
struct mdp5_sub_block intf;
+ u32 intfs[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
+
uint32_t max_clk;
};