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author | Hai Li | 2015-06-25 01:13:40 +0200 |
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committer | Rob Clark | 2015-08-16 00:27:14 +0200 |
commit | 9b7a9fc29a48026d797cbf237121850c1c241df4 (patch) | |
tree | 72918a017f2186b142ec861c418370d55426c333 /drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | |
parent | drm/msm/hdmi: standardize on lead chip for compatible names (diff) | |
download | kernel-qcow2-linux-9b7a9fc29a48026d797cbf237121850c1c241df4.tar.gz kernel-qcow2-linux-9b7a9fc29a48026d797cbf237121850c1c241df4.tar.xz kernel-qcow2-linux-9b7a9fc29a48026d797cbf237121850c1c241df4.zip |
drm/msm: Set different display size limitation on each target
The maximum output width of one pipeline depends on the LayerMixer's
capability. It may be different on each target. Also, MDP5 doesn't
have vertical limitation in one frame, as long as the pixel clock
can be supported.
This change obtains the maximum LM resolution from configuration
table and treat it as the whole pipe's limitation for MDP5. The size
limit on MDP4 is not changed.
Signed-off-by: Hai Li <hali@codeaurora.org>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h')
-rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h index 69349abe59f2..8a19d271d18f 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h @@ -42,6 +42,8 @@ struct mdp5_sub_block { struct mdp5_lm_block { MDP5_SUB_BLOCK_DEFINITION; uint32_t nb_stages; /* number of stages per blender */ + uint32_t max_width; /* Maximum output resolution */ + uint32_t max_height; }; struct mdp5_ctl_block { |