diff options
| author | Rob Clark | 2016-11-01 21:35:32 +0100 |
|---|---|---|
| committer | Rob Clark | 2016-11-27 17:32:34 +0100 |
| commit | 49ec5b2e5acb8174a4418c67a3ce4e4cf9be2790 (patch) | |
| tree | a215d5dfd383d36c62b7fec7d2ea2f4b524c78bb /drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h | |
| parent | drm/msm/mdp5: dynamically assign hw pipes to planes (diff) | |
| download | kernel-qcow2-linux-49ec5b2e5acb8174a4418c67a3ce4e4cf9be2790.tar.gz kernel-qcow2-linux-49ec5b2e5acb8174a4418c67a3ce4e4cf9be2790.tar.xz kernel-qcow2-linux-49ec5b2e5acb8174a4418c67a3ce4e4cf9be2790.zip | |
drm/msm/mdp5: handle SMP block allocations "atomically"
Previously, SMP block allocation was not checked in the plane's
atomic_check() fxn, so we could fail allocation SMP block allocation at
atomic_update() time. Re-work the block allocation to request blocks
during atomic_check(), but not update the hw until committing the atomic
update.
Since SMP blocks allocated at atomic_check() time, we need to manage the
SMP state as part of mdp5_state (global atomic state). This actually
ends up significantly simplifying the SMP management, as the SMP module
does not need to manage the intermediate state between assigning new
blocks before setting flush bits and releasing old blocks after vblank.
(The SMP registers and SMP allocation is not double-buffered, so newly
allocated blocks need to be updated in kms->prepare_commit() released
blocks in kms->complete_commit().)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h')
| -rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h index e1f3314c5f2e..611da7a660c9 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h @@ -32,6 +32,11 @@ struct mdp5_hw_pipe { uint32_t caps; uint32_t flush_mask; /* used to commit pipe registers */ + + /* number of smp blocks per plane, ie: + * nblks_y | (nblks_u << 8) | (nblks_v << 16) + */ + uint32_t blkcfg; }; /* global atomic state of assignment between pipes and planes: */ @@ -41,7 +46,7 @@ struct mdp5_hw_pipe_state { struct mdp5_hw_pipe *__must_check mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, - uint32_t caps); + uint32_t caps, uint32_t blkcfg); void mdp5_pipe_release(struct drm_atomic_state *s, struct mdp5_hw_pipe *hwpipe); struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe, |