diff options
| author | Rob Clark | 2013-11-16 18:56:06 +0100 |
|---|---|---|
| committer | Rob Clark | 2014-01-09 20:38:58 +0100 |
| commit | 871d812aa43e6350a4edf41bf7cb0879675255f1 (patch) | |
| tree | a1700a8c806367a0f85b199f620aed2441277b8b /drivers/gpu/drm/msm/msm_gem.h | |
| parent | drm/msm: fix bus scaling (diff) | |
| download | kernel-qcow2-linux-871d812aa43e6350a4edf41bf7cb0879675255f1.tar.gz kernel-qcow2-linux-871d812aa43e6350a4edf41bf7cb0879675255f1.tar.xz kernel-qcow2-linux-871d812aa43e6350a4edf41bf7cb0879675255f1.zip | |
drm/msm: add support for non-IOMMU systems
Add a VRAM carveout that is used for systems which do not have an IOMMU.
The VRAM carveout uses CMA. The arch code must setup a CMA pool for the
device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
cool). The user can configure the VRAM pool size using msm.vram module
param.
Technically, the abstraction of IOMMU behind msm_mmu is not strictly
needed, but it simplifies the GEM code a bit, and will be useful later
when I add support for a2xx devices with GPUMMU, so I decided to keep
this part.
It appears to be possible to configure the GPU to restrict access to
addresses within the VRAM pool, but this is not done yet. So for now
the GPU will refuse to load if there is no sort of mmu. Once address
based limits are supported and tested to confirm that we aren't giving
the GPU access to arbitrary memory, this restriction can be lifted
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gem.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_gem.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index f4f23a578d9d..3246bb46c4f2 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -57,6 +57,11 @@ struct msm_gem_object { /* normally (resv == &_resv) except for imported bo's */ struct reservation_object *resv; struct reservation_object _resv; + + /* For physically contiguous buffers. Used when we don't have + * an IOMMU. + */ + struct drm_mm_node *vram_node; }; #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) |