diff options
| author | Ben Skeggs | 2014-08-09 20:10:30 +0200 |
|---|---|---|
| committer | Ben Skeggs | 2014-08-09 21:28:16 +0200 |
| commit | 67cfbfdfec9fade9886ff23717023e3149926a49 (patch) | |
| tree | 0776a33c94770d9bf4996dfff868e4c7eed97182 /drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | |
| parent | drm/gf100-/gr: fetch tpcs-per-ppc info on startup (diff) | |
| download | kernel-qcow2-linux-67cfbfdfec9fade9886ff23717023e3149926a49.tar.gz kernel-qcow2-linux-67cfbfdfec9fade9886ff23717023e3149926a49.tar.xz kernel-qcow2-linux-67cfbfdfec9fade9886ff23717023e3149926a49.zip | |
drm/gf100-/gr: unhardcode attribute cb config
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | 31 |
1 files changed, 6 insertions, 25 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c index 9dfb60d8e5a8..22de56b39a88 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c @@ -872,31 +872,6 @@ nve4_grctx_generate_pagepool(struct nvc0_grctx *info) void nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) { - u32 magic[GPC_MAX][2]; - u32 offset; - int gpc; - - mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW); - mmio_list(0x418810, 0x80000000, 12, 2); - mmio_list(0x419848, 0x10000000, 12, 2); - - mmio_list(0x405830, 0x02180648, 0, 0); - mmio_list(0x4064c4, 0x0192ffff, 0, 0); - - for (gpc = 0, offset = 0; gpc < priv->gpc_nr; gpc++) { - u16 magic0 = 0x0218 * priv->tpc_nr[gpc]; - u16 magic1 = 0x0648 * priv->tpc_nr[gpc]; - magic[gpc][0] = 0x10000000 | (magic0 << 16) | offset; - magic[gpc][1] = 0x00000000 | (magic1 << 16); - offset += 0x0324 * priv->tpc_nr[gpc]; - } - - for (gpc = 0; gpc < priv->gpc_nr; gpc++) { - mmio_list(GPC_UNIT(gpc, 0x30c0), magic[gpc][0], 0, 0); - mmio_list(GPC_UNIT(gpc, 0x30e4), magic[gpc][1] | offset, 0, 0); - offset += 0x07ff * priv->tpc_nr[gpc]; - } - mmio_list(0x17e91c, 0x06060609, 0, 0); mmio_list(0x17e920, 0x00090a05, 0, 0); } @@ -988,6 +963,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) oclass->bundle(info); oclass->pagepool(info); + oclass->attrib(info); oclass->mods(priv, info); oclass->unkn(priv); @@ -1045,4 +1021,9 @@ nve4_grctx_oclass = &(struct nvc0_grctx_oclass) { .bundle_token_limit = 0x600, .pagepool = nve4_grctx_generate_pagepool, .pagepool_size = 0x8000, + .attrib = nvd7_grctx_generate_attrib, + .attrib_nr_max = 0x324, + .attrib_nr = 0x218, + .alpha_nr_max = 0x7ff, + .alpha_nr = 0x648, }.base; |