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| author | Ben Skeggs | 2012-02-06 07:20:30 +0100 |
|---|---|---|
| committer | Ben Skeggs | 2012-05-24 08:31:36 +0200 |
| commit | 78c20186581c7558429b591fb2942be44b47d59f (patch) | |
| tree | 44eb50599b8142f1a3a8088bf5db3e9ec879763b /drivers/gpu/drm/nouveau/nva3_pm.c | |
| parent | drm/nvc0/pm: very initial mclk freq change (diff) | |
| download | kernel-qcow2-linux-78c20186581c7558429b591fb2942be44b47d59f.tar.gz kernel-qcow2-linux-78c20186581c7558429b591fb2942be44b47d59f.tar.xz kernel-qcow2-linux-78c20186581c7558429b591fb2942be44b47d59f.zip | |
drm/nouveau/pm: some more delays for ddr3 reclocking
These numbers from the binary driver's daemon scripts, and fix the transition
to perflvl 3 on my T510.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nva3_pm.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nva3_pm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c index d51e8f86b4d5..798829353fb6 100644 --- a/drivers/gpu/drm/nouveau/nva3_pm.c +++ b/drivers/gpu/drm/nouveau/nva3_pm.c @@ -344,6 +344,7 @@ mclk_refresh_self(struct nouveau_mem_exec_func *exec, bool enable) static void mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) { + volatile u32 post = nv_rd32(exec->dev, 0); (void)post; udelay((nsec + 500) / 1000); } |