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| author | Martin Peres | 2011-07-10 00:08:41 +0200 |
|---|---|---|
| committer | Ben Skeggs | 2011-12-21 10:01:23 +0100 |
| commit | dd1da8de172057b36860f427777ecfa293bb8f6c (patch) | |
| tree | d31ad5ed9528cb74843a58dc084e9bcdbe2e7587 /drivers/gpu/drm/nouveau/nva3_pm.c | |
| parent | drm/nvd0: read temperature as we did on nv84+ boards (diff) | |
| download | kernel-qcow2-linux-dd1da8de172057b36860f427777ecfa293bb8f6c.tar.gz kernel-qcow2-linux-dd1da8de172057b36860f427777ecfa293bb8f6c.tar.xz kernel-qcow2-linux-dd1da8de172057b36860f427777ecfa293bb8f6c.zip | |
drm/nouveau/pm: make clocks_set return an error code clocks_set can fail.
Reporting an error is better than silently refusing to reclock.
V2: Use the same logic on nv40
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nva3_pm.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nva3_pm.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c index 618c144b7a30..9e636e6ef6d7 100644 --- a/drivers/gpu/drm/nouveau/nva3_pm.c +++ b/drivers/gpu/drm/nouveau/nva3_pm.c @@ -287,12 +287,13 @@ nva3_pm_grcp_idle(void *data) return false; } -void +int nva3_pm_clocks_set(struct drm_device *dev, void *pre_state) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nva3_pm_state *info = pre_state; unsigned long flags; + int ret = -EAGAIN; /* prevent any new grctx switches from starting */ spin_lock_irqsave(&dev_priv->context_switch_lock, flags); @@ -328,6 +329,8 @@ nva3_pm_clocks_set(struct drm_device *dev, void *pre_state) nv_wr32(dev, 0x100210, 0x80000000); } + ret = 0; + cleanup: /* unfreeze PFIFO */ nv_mask(dev, 0x002504, 0x00000001, 0x00000000); @@ -339,4 +342,5 @@ cleanup: nv_mask(dev, 0x400824, 0x10000000, 0x10000000); spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); kfree(info); + return ret; } |