diff options
| author | Alex Deucher | 2014-09-30 16:39:30 +0200 |
|---|---|---|
| committer | Alex Deucher | 2015-03-19 17:26:31 +0100 |
| commit | 99550ee9e803d9e2cd405bdcfb3d094ea227eb58 (patch) | |
| tree | ed1b65b1562cdceb9148e36d08f8078ca12c01d7 /drivers/gpu/drm/radeon/btc_dpm.c | |
| parent | drm/radeon/rv7xx/eg: implement get_current_sclk/mclk (diff) | |
| download | kernel-qcow2-linux-99550ee9e803d9e2cd405bdcfb3d094ea227eb58.tar.gz kernel-qcow2-linux-99550ee9e803d9e2cd405bdcfb3d094ea227eb58.tar.xz kernel-qcow2-linux-99550ee9e803d9e2cd405bdcfb3d094ea227eb58.zip | |
drm/radeon/btc: implement get_current_sclk/mclk
Will be used for exposing current clocks via INFO ioctl.
Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/btc_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/btc_dpm.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c index db08f17be76b..04afb0047423 100644 --- a/drivers/gpu/drm/radeon/btc_dpm.c +++ b/drivers/gpu/drm/radeon/btc_dpm.c @@ -2761,6 +2761,52 @@ void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, } } +u32 btc_dpm_get_current_sclk(struct radeon_device *rdev) +{ + struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); + struct radeon_ps *rps = &eg_pi->current_rps; + struct rv7xx_ps *ps = rv770_get_ps(rps); + struct rv7xx_pl *pl; + u32 current_index = + (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> + CURRENT_PROFILE_INDEX_SHIFT; + + if (current_index > 2) { + return 0; + } else { + if (current_index == 0) + pl = &ps->low; + else if (current_index == 1) + pl = &ps->medium; + else /* current_index == 2 */ + pl = &ps->high; + return pl->sclk; + } +} + +u32 btc_dpm_get_current_mclk(struct radeon_device *rdev) +{ + struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); + struct radeon_ps *rps = &eg_pi->current_rps; + struct rv7xx_ps *ps = rv770_get_ps(rps); + struct rv7xx_pl *pl; + u32 current_index = + (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> + CURRENT_PROFILE_INDEX_SHIFT; + + if (current_index > 2) { + return 0; + } else { + if (current_index == 0) + pl = &ps->low; + else if (current_index == 1) + pl = &ps->medium; + else /* current_index == 2 */ + pl = &ps->high; + return pl->mclk; + } +} + u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low) { struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); |