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| author | Eric Anholt | 2017-02-27 21:11:43 +0100 |
|---|---|---|
| committer | Eric Anholt | 2017-02-28 21:51:49 +0100 |
| commit | f6c01530fd987eb70e051580d831ac04ef920352 (patch) | |
| tree | 3c294fd04e8f43cca7f728c7a2c96a001ea3a976 /drivers/gpu/drm/vc4/vc4_crtc.c | |
| parent | drm/vc4: Add RST to bring together vc4 kerneldoc. (diff) | |
| download | kernel-qcow2-linux-f6c01530fd987eb70e051580d831ac04ef920352.tar.gz kernel-qcow2-linux-f6c01530fd987eb70e051580d831ac04ef920352.tar.xz kernel-qcow2-linux-f6c01530fd987eb70e051580d831ac04ef920352.zip | |
drm/vc4: Extend and edit documentation for output from the RST
I had written most of my comments as if I was describing the
individual code files the way I used to for doxygen, while for RST we
want to describe things in a more chapter/section way where there's no
obvious relation to .c files.
Additionally, several of the files had stub descriptions that I've
taken this opportunity to extend.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170227201144.10970-4-eric@anholt.net
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_crtc.c')
| -rw-r--r-- | drivers/gpu/drm/vc4/vc4_crtc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index fd6f8d9669ce..24edd0c22cc9 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -11,12 +11,13 @@ * * In VC4, the Pixel Valve is what most closely corresponds to the * DRM's concept of a CRTC. The PV generates video timings from the - * output's clock plus its configuration. It pulls scaled pixels from + * encoder's clock plus its configuration. It pulls scaled pixels from * the HVS at that timing, and feeds it to the encoder. * * However, the DRM CRTC also collects the configuration of all the - * DRM planes attached to it. As a result, this file also manages - * setup of the VC4 HVS's display elements on the CRTC. + * DRM planes attached to it. As a result, the CRTC is also + * responsible for writing the display list for the HVS channel that + * the CRTC will use. * * The 2835 has 3 different pixel valves. pv0 in the audio power * domain feeds DSI0 or DPI, while pv1 feeds DS1 or SMI. pv2 in the |