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| author | Dmytro Laktyushkin | 2017-07-28 20:16:13 +0200 |
|---|---|---|
| committer | Alex Deucher | 2017-09-27 00:15:58 +0200 |
| commit | e75504b1292f3a9a173789a06a674fb3ba04450f (patch) | |
| tree | c336db7e01995cb5a4b7d0cb67d99504f29b7b06 /drivers/gpu/drm | |
| parent | drm/amd/display: Add stateless surface validation to validate_resources (diff) | |
| download | kernel-qcow2-linux-e75504b1292f3a9a173789a06a674fb3ba04450f.tar.gz kernel-qcow2-linux-e75504b1292f3a9a173789a06a674fb3ba04450f.tar.xz kernel-qcow2-linux-e75504b1292f3a9a173789a06a674fb3ba04450f.zip | |
drm/amd/display: fix dcn fe reset memory access error
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index e1298d7029e6..fa19c6b92f29 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -853,8 +853,9 @@ static void plane_atomic_disable(struct core_dc *dc, struct dce_hwseq *hws = dc->hwseq; struct mem_input *mi = dc->res_pool->mis[fe_idx]; struct mpc *mpc = dc->res_pool->mpc; + int opp_id = mi->opp_id; - if (mi->opp_id == 0xf) + if (opp_id == 0xf) return; mpc->funcs->wait_for_idle(mpc, mi->mpcc_id); @@ -876,8 +877,8 @@ static void plane_atomic_disable(struct core_dc *dc, REG_UPDATE(DPP_CONTROL[fe_idx], DPP_CLOCK_ENABLE, 0); - if (dc->res_pool->opps[mi->opp_id]->mpc_tree.num_pipes == 0) - REG_UPDATE(OPP_PIPE_CONTROL[mi->opp_id], + if (dc->res_pool->opps[opp_id]->mpc_tree.num_pipes == 0) + REG_UPDATE(OPP_PIPE_CONTROL[opp_id], OPP_PIPE_CLOCK_EN, 0); if (dc->public.debug.sanity_checks) |