diff options
| author | Daniel Vetter | 2013-02-14 19:46:07 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2013-02-20 00:21:47 +0100 |
| commit | eb32e4584d8e9d6cbec20550d4f91396de2cdb55 (patch) | |
| tree | 00aa2e120f0a86df9b7071836f5d8a829ac3af8d /drivers/gpu/drm | |
| parent | drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+ (diff) | |
| download | kernel-qcow2-linux-eb32e4584d8e9d6cbec20550d4f91396de2cdb55.tar.gz kernel-qcow2-linux-eb32e4584d8e9d6cbec20550d4f91396de2cdb55.tar.xz kernel-qcow2-linux-eb32e4584d8e9d6cbec20550d4f91396de2cdb55.zip | |
drm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remap
Yet another remnant ... this might explain why l3 remapping didn't
really work on HSW.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441
Spotted-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index a3678018af36..8413ffced815 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3872,7 +3872,7 @@ void i915_gem_l3_remap(struct drm_device *dev) u32 misccpctl; int i; - if (!IS_IVYBRIDGE(dev)) + if (!HAS_L3_GPU_CACHE(dev)) return; if (!dev_priv->l3_parity.remap_info) |