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authorVille Syrjälä2017-11-23 20:04:57 +0100
committerVille Syrjälä2018-01-23 16:41:55 +0100
commit07579ed1532cb49c8cf9d76700e107e0084855eb (patch)
tree8d336b754724e497a04099064a42ae7b3fb15ec2 /drivers/gpu
parentdrm/msm/mdp5: Use drm_mode_get_hv_timing() to populate plane clip rectangle (diff)
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drm/nouveau/kms/nv50: Use drm_mode_get_hv_timing() to populate plane clip rectangle
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171123190502.28449-11-ville.syrjala@linux.intel.com Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index b22c37bde13f..5a9a51c735f0 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -228,8 +228,6 @@ struct nv50_wndw_atom {
struct drm_plane_state state;
u8 interval;
- struct drm_rect clip;
-
struct {
u32 handle;
u16 offset:12;
@@ -840,10 +838,6 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw,
int ret;
NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
- asyw->clip.x1 = 0;
- asyw->clip.y1 = 0;
- asyw->clip.x2 = asyh->state.mode.hdisplay;
- asyw->clip.y2 = asyh->state.mode.vdisplay;
asyw->image.w = fb->base.width;
asyw->image.h = fb->base.height;
@@ -1141,10 +1135,15 @@ static int
nv50_curs_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
struct nv50_head_atom *asyh)
{
+ struct drm_rect clip = {};
int ret;
+ if (asyh->state.enable)
+ drm_mode_get_hv_timing(&asyh->state.mode,
+ &clip.x2, &clip.y2);
+
ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
- &asyw->clip,
+ &clip,
DRM_PLANE_HELPER_NO_SCALING,
DRM_PLANE_HELPER_NO_SCALING,
true, true);
@@ -1428,13 +1427,18 @@ nv50_base_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
struct nv50_head_atom *asyh)
{
const struct drm_framebuffer *fb = asyw->state.fb;
+ struct drm_rect clip = {};
int ret;
if (!fb->format->depth)
return -EINVAL;
+ if (asyh->state.enable)
+ drm_mode_get_hv_timing(&asyh->state.mode,
+ &clip.x2, &clip.y2);
+
ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
- &asyw->clip,
+ &clip,
DRM_PLANE_HELPER_NO_SCALING,
DRM_PLANE_HELPER_NO_SCALING,
false, true);