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author | Damien Lespiau | 2015-02-09 20:33:11 +0100 |
---|---|---|
committer | Daniel Vetter | 2015-02-13 23:28:38 +0100 |
commit | 183c6daceb7efa512ba93efd95766c59f175bbcf (patch) | |
tree | c991ae5ead64eeb3b1a94ce383720459b2466696 /drivers/gpu | |
parent | drm/i915: Add process identifier to requests (diff) | |
download | kernel-qcow2-linux-183c6daceb7efa512ba93efd95766c59f175bbcf.tar.gz kernel-qcow2-linux-183c6daceb7efa512ba93efd95766c59f175bbcf.tar.xz kernel-qcow2-linux-183c6daceb7efa512ba93efd95766c59f175bbcf.zip |
drm/i915/skl: Implement WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 39bdbf9688e4..0b522d3f529d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5242,12 +5242,16 @@ enum skl_disp_power_wells { /* GEN7 chicken */ #define GEN7_COMMON_SLICE_CHICKEN1 0x7010 # define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) +# define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14) #define COMMON_SLICE_CHICKEN2 0x7014 # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) #define HIZ_CHICKEN 0x7018 # define CHV_HZ_8X8_MODE_IN_1X (1<<15) +#define GEN9_SLICE_COMMON_ECO_CHICKEN0 0x7308 +#define DISABLE_PIXEL_MASK_CAMMING (1<<14) + #define GEN7_L3SQCREG1 0xB010 #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index dde0bec7aefd..e9a85a575a1c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -968,6 +968,14 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) ~GEN9_DG_MIRROR_FIX_ENABLE); } + if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) { + /* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl */ + WA_SET_BIT_MASKED(GEN7_COMMON_SLICE_CHICKEN1, + GEN9_RHWO_OPTIMIZATION_DISABLE); + WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN0, + DISABLE_PIXEL_MASK_CAMMING); + } + if (INTEL_REVID(dev) >= SKL_REVID_C0) { /* WaEnableYV12BugFixInHalfSliceChicken7:skl */ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, |