diff options
author | Jack Xiao | 2019-05-06 10:28:22 +0200 |
---|---|---|
committer | Alex Deucher | 2019-06-22 01:59:28 +0200 |
commit | 2a8bfa139a4515cd020c7a5be1e1e45d5d116352 (patch) | |
tree | cb50d543b6ceca32ff013a33e02988207efdc623 /drivers/gpu | |
parent | drm/amd/powerplay: disable uclk dpm by default (diff) | |
download | kernel-qcow2-linux-2a8bfa139a4515cd020c7a5be1e1e45d5d116352.tar.gz kernel-qcow2-linux-2a8bfa139a4515cd020c7a5be1e1e45d5d116352.tar.xz kernel-qcow2-linux-2a8bfa139a4515cd020c7a5be1e1e45d5d116352.zip |
drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled
MP1 cannot access clock IP during MP1 FW reload, disable PLL
shutdown as a workaround.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index af4b07a02426..2466c2ab13d4 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -383,10 +383,14 @@ static int navi10_append_powerplay_table(struct smu_context *smu) /* Mvdd Svi2 Div Ratio Setting */ smc_pptable->MvddRatio = smc_dpm_table->MvddRatio; - if (adev->pm.pp_feature & PP_GFXOFF_MASK) + if (adev->pm.pp_feature & PP_GFXOFF_MASK) { *(uint64_t *)smc_pptable->FeaturesToRun |= FEATURE_MASK(FEATURE_GFX_SS_BIT) | FEATURE_MASK(FEATURE_GFXOFF_BIT); + /* TODO: remove it once SMU fw fix it */ + smc_pptable->DebugOverrides |= DPM_OVERRIDE_DISABLE_DFLL_PLL_SHUTDOWN; + } + return 0; } |