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| author | Weitao Hou | 2019-05-18 15:41:41 +0200 |
|---|---|---|
| committer | Alex Deucher | 2019-05-24 19:21:01 +0200 |
| commit | 5208e6a3b25d0fe7acd812957b4a5e745b86e957 (patch) | |
| tree | cdcacc07f9e16a7c36d55448d0e6615fa4fbc170 /drivers/gpu | |
| parent | drm/amd/powerplay: fix sw SMU wrong UVD/VCE powergate setting (diff) | |
| download | kernel-qcow2-linux-5208e6a3b25d0fe7acd812957b4a5e745b86e957.tar.gz kernel-qcow2-linux-5208e6a3b25d0fe7acd812957b4a5e745b86e957.tar.xz kernel-qcow2-linux-5208e6a3b25d0fe7acd812957b4a5e745b86e957.zip | |
gpu: fix typos in code comments
fix eror to error
Signed-off-by: Weitao Hou <houweitaoo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index f70437aae8e0..df422440845b 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -183,8 +183,8 @@ static bool calculate_fb_and_fractional_fb_divider( *RETURNS: * It fills the PLLSettings structure with PLL Dividers values * if calculated values are within required tolerance -* It returns - true if eror is within tolerance -* - false if eror is not within tolerance +* It returns - true if error is within tolerance +* - false if error is not within tolerance */ static bool calc_fb_divider_checking_tolerance( struct calc_pll_clock_source *calc_pll_cs, |