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| author | Jean Delvare | 2012-12-19 22:16:59 +0100 |
|---|---|---|
| committer | Jean Delvare | 2012-12-19 22:16:59 +0100 |
| commit | d6dab7dd123ba6a737e69d89c8cca9c6d9b75aa9 (patch) | |
| tree | 64ecfc90d3bca65fe952c6dd5f10ac1341f7a2a8 /drivers/hwmon/hwmon.c | |
| parent | Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux (diff) | |
| download | kernel-qcow2-linux-d6dab7dd123ba6a737e69d89c8cca9c6d9b75aa9.tar.gz kernel-qcow2-linux-d6dab7dd123ba6a737e69d89c8cca9c6d9b75aa9.tar.xz kernel-qcow2-linux-d6dab7dd123ba6a737e69d89c8cca9c6d9b75aa9.zip | |
hwmon: Fix PCI device reference leak in quirk
Thankfully this only affects systems with one specific south bridge
and is most probably harmless unless the hwmon module is heavily
cycled.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon/hwmon.c')
| -rw-r--r-- | drivers/hwmon/hwmon.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c index c3c471ca202f..646314f7c839 100644 --- a/drivers/hwmon/hwmon.c +++ b/drivers/hwmon/hwmon.c @@ -84,19 +84,21 @@ static void __init hwmon_pci_quirks(void) /* Open access to 0x295-0x296 on MSI MS-7031 */ sb = pci_get_device(PCI_VENDOR_ID_ATI, 0x436c, NULL); - if (sb && - (sb->subsystem_vendor == 0x1462 && /* MSI */ - sb->subsystem_device == 0x0031)) { /* MS-7031 */ - - pci_read_config_byte(sb, 0x48, &enable); - pci_read_config_word(sb, 0x64, &base); - - if (base == 0 && !(enable & BIT(2))) { - dev_info(&sb->dev, - "Opening wide generic port at 0x295\n"); - pci_write_config_word(sb, 0x64, 0x295); - pci_write_config_byte(sb, 0x48, enable | BIT(2)); + if (sb) { + if (sb->subsystem_vendor == 0x1462 && /* MSI */ + sb->subsystem_device == 0x0031) { /* MS-7031 */ + pci_read_config_byte(sb, 0x48, &enable); + pci_read_config_word(sb, 0x64, &base); + + if (base == 0 && !(enable & BIT(2))) { + dev_info(&sb->dev, + "Opening wide generic port at 0x295\n"); + pci_write_config_word(sb, 0x64, 0x295); + pci_write_config_byte(sb, 0x48, + enable | BIT(2)); + } } + pci_dev_put(sb); } #endif } |