diff options
| author | Stefan Roese | 2012-04-18 15:01:41 +0200 |
|---|---|---|
| committer | Wolfram Sang | 2012-05-12 14:28:11 +0200 |
| commit | a8a9f3fef1aa5226818af91b7a241de6d74d369c (patch) | |
| tree | 8002e2cc53f5e195b0237e9ee54cccd6d31d72ec /drivers/i2c/busses/i2c-designware-core.c | |
| parent | i2c: Dynamically assign adapter id if it wasn't explictly specified (diff) | |
| download | kernel-qcow2-linux-a8a9f3fef1aa5226818af91b7a241de6d74d369c.tar.gz kernel-qcow2-linux-a8a9f3fef1aa5226818af91b7a241de6d74d369c.tar.xz kernel-qcow2-linux-a8a9f3fef1aa5226818af91b7a241de6d74d369c.zip | |
i2c: designware: Add support for 16bit register access
The STM SPEAr platform can only access the i2c controller register
via 16bit read/write functions. This patch adds support to
automatically detect this 16bit access mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-core.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-core.c | 31 |
1 files changed, 21 insertions, 10 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index df8799241009..1e48bec80edf 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -164,9 +164,15 @@ static char *abort_sources[] = { u32 dw_readl(struct dw_i2c_dev *dev, int offset) { - u32 value = readl(dev->base + offset); + u32 value; - if (dev->swab) + if (dev->accessor_flags & ACCESS_16BIT) + value = readw(dev->base + offset) | + (readw(dev->base + offset + 2) << 16); + else + value = readl(dev->base + offset); + + if (dev->accessor_flags & ACCESS_SWAP) return swab32(value); else return value; @@ -174,10 +180,15 @@ u32 dw_readl(struct dw_i2c_dev *dev, int offset) void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) { - if (dev->swab) + if (dev->accessor_flags & ACCESS_SWAP) b = swab32(b); - writel(b, dev->base + offset); + if (dev->accessor_flags & ACCESS_16BIT) { + writew((u16)b, dev->base + offset); + writew((u16)(b >> 16), dev->base + offset + 2); + } else { + writel(b, dev->base + offset); + } } static u32 @@ -251,14 +262,14 @@ int i2c_dw_init(struct dw_i2c_dev *dev) input_clock_khz = dev->get_clk_rate_khz(dev); - /* Configure register endianess access */ reg = dw_readl(dev, DW_IC_COMP_TYPE); if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { - dev->swab = 1; - reg = DW_IC_COMP_TYPE_VALUE; - } - - if (reg != DW_IC_COMP_TYPE_VALUE) { + /* Configure register endianess access */ + dev->accessor_flags |= ACCESS_SWAP; + } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) { + /* Configure register access mode 16bit */ + dev->accessor_flags |= ACCESS_16BIT; + } else if (reg != DW_IC_COMP_TYPE_VALUE) { dev_err(dev->dev, "Unknown Synopsys component type: " "0x%08x\n", reg); return -ENODEV; |