summaryrefslogtreecommitdiffstats
path: root/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
diff options
context:
space:
mode:
authorDaniel Baluta2016-02-18 16:53:07 +0100
committerJonathan Cameron2016-02-24 21:40:42 +0100
commitacf7146ec9700bb71115cf1374954fe1709b6b19 (patch)
tree99cc6256f6f5425e7726aa0f587d82ab2be85018 /drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
parentiio: imu: inv_mpu6050: Fix multiline comments style (diff)
downloadkernel-qcow2-linux-acf7146ec9700bb71115cf1374954fe1709b6b19.tar.gz
kernel-qcow2-linux-acf7146ec9700bb71115cf1374954fe1709b6b19.tar.xz
kernel-qcow2-linux-acf7146ec9700bb71115cf1374954fe1709b6b19.zip
iio: imu: inv_mpu6050: Fix Yoda conditions
This fixes the following checkpatch warning: * WARNING: Comparisons should place the constant on the right side of the test Signed-off-by: Daniel Baluta <daniel.baluta@intel.com> Acked-by: Crt Mori <cmo@melexis.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/imu/inv_mpu6050/inv_mpu_core.c')
-rw-r--r--drivers/iio/imu/inv_mpu6050/inv_mpu_core.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
index 84e014cc67c3..c550ebb19ee6 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
@@ -84,7 +84,7 @@ int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
* clock source be switched to gyro. Otherwise, it must be set to
* internal clock
*/
- if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
+ if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
if (result)
return result;
@@ -92,7 +92,7 @@ int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
}
- if ((INV_MPU6050_BIT_PWR_GYRO_STBY == mask) && (!en)) {
+ if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
/*
* turning off gyro requires switch to internal clock first.
* Then turn off gyro engine
@@ -117,7 +117,7 @@ int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
if (en) {
/* Wait for output stabilize */
msleep(INV_MPU6050_TEMP_UP_TIME);
- if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
+ if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
/* switch internal clock to PLL */
mgmt_1 |= INV_CLK_PLL;
result = regmap_write(st->map,