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| author | Easwar Hariharan | 2016-10-17 13:19:47 +0200 |
|---|---|---|
| committer | Doug Ledford | 2016-11-15 22:37:27 +0100 |
| commit | fe4d924396a861937256293ff4a84b76b84854d8 (patch) | |
| tree | 6010c15763864174b4108f0d19b0bfa305c5932d /drivers/infiniband/hw/hfi1/chip_registers.h | |
| parent | IB/hfi1: Optimize devdata cachelines (diff) | |
| download | kernel-qcow2-linux-fe4d924396a861937256293ff4a84b76b84854d8.tar.gz kernel-qcow2-linux-fe4d924396a861937256293ff4a84b76b84854d8.tar.xz kernel-qcow2-linux-fe4d924396a861937256293ff4a84b76b84854d8.zip | |
IB/hfi1: Add active channel and backplane support for integrated devices
Use scratch registers within the HFI1 device to recover signal
integrity information that is then used to tune the channel. While
there, update error messages to better convey the result of falling
back to a backup file.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Reviewed-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Easwar Hariharan <easwar.hariharan@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw/hfi1/chip_registers.h')
| -rw-r--r-- | drivers/infiniband/hw/hfi1/chip_registers.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/hfi1/chip_registers.h b/drivers/infiniband/hw/hfi1/chip_registers.h index 5b9993899789..5bfa839d1c48 100644 --- a/drivers/infiniband/hw/hfi1/chip_registers.h +++ b/drivers/infiniband/hw/hfi1/chip_registers.h @@ -415,6 +415,9 @@ #define ASIC_CFG_SBUS_REQUEST_DATA_IN_SHIFT 32 #define ASIC_CFG_SBUS_REQUEST_RECEIVER_ADDR_SHIFT 0 #define ASIC_CFG_SCRATCH (ASIC + 0x000000000020) +#define ASIC_CFG_SCRATCH_1 (ASIC_CFG_SCRATCH + 0x08) +#define ASIC_CFG_SCRATCH_2 (ASIC_CFG_SCRATCH + 0x10) +#define ASIC_CFG_SCRATCH_3 (ASIC_CFG_SCRATCH + 0x18) #define ASIC_CFG_THERM_POLL_EN (ASIC + 0x000000000050) #define ASIC_EEP_ADDR_CMD (ASIC + 0x000000000308) #define ASIC_EEP_ADDR_CMD_EP_ADDR_MASK 0xFFFFFFull |