diff options
| author | Dean Luick | 2016-12-08 04:32:22 +0100 |
|---|---|---|
| committer | Doug Ledford | 2016-12-11 21:25:13 +0100 |
| commit | d7cf4ccf6fe52694142f65cce82decb3fe833f48 (patch) | |
| tree | cd7c44ab53d6efe1bdd35ddffedec2077bfaafa7 /drivers/infiniband/hw/hfi1/firmware.c | |
| parent | IB/hfi1: Read new EPROM format (diff) | |
| download | kernel-qcow2-linux-d7cf4ccf6fe52694142f65cce82decb3fe833f48.tar.gz kernel-qcow2-linux-d7cf4ccf6fe52694142f65cce82decb3fe833f48.tar.xz kernel-qcow2-linux-d7cf4ccf6fe52694142f65cce82decb3fe833f48.zip | |
IB/hfi1: Fix dc8051 multiple qword memory reads
When reading multiple dc8051 data memory locations
at once, the read enabled field must be toggled
at every address change. Do that by writing only
the address first, then writing the enable.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw/hfi1/firmware.c')
| -rw-r--r-- | drivers/infiniband/hw/hfi1/firmware.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/infiniband/hw/hfi1/firmware.c b/drivers/infiniband/hw/hfi1/firmware.c index 9a36c8c2f8a1..bcf7da4599c4 100644 --- a/drivers/infiniband/hw/hfi1/firmware.c +++ b/drivers/infiniband/hw/hfi1/firmware.c @@ -263,11 +263,13 @@ static int __read_8051_data(struct hfi1_devdata *dd, u32 addr, u64 *result) u64 reg; int count; - /* start the read at the given address */ - reg = ((addr & DC_DC8051_CFG_RAM_ACCESS_CTRL_ADDRESS_MASK) - << DC_DC8051_CFG_RAM_ACCESS_CTRL_ADDRESS_SHIFT) - | DC_DC8051_CFG_RAM_ACCESS_CTRL_READ_ENA_SMASK; + /* step 1: set the address, clear enable */ + reg = (addr & DC_DC8051_CFG_RAM_ACCESS_CTRL_ADDRESS_MASK) + << DC_DC8051_CFG_RAM_ACCESS_CTRL_ADDRESS_SHIFT; write_csr(dd, DC_DC8051_CFG_RAM_ACCESS_CTRL, reg); + /* step 2: enable */ + write_csr(dd, DC_DC8051_CFG_RAM_ACCESS_CTRL, + reg | DC_DC8051_CFG_RAM_ACCESS_CTRL_READ_ENA_SMASK); /* wait until ACCESS_COMPLETED is set */ count = 0; |