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| author | Lijun Ou | 2016-09-16 00:48:11 +0200 |
|---|---|---|
| committer | Doug Ledford | 2016-10-03 17:43:10 +0200 |
| commit | b280db52cc71a0cb135c2ab9adc0592af6440812 (patch) | |
| tree | fc47296851c739d8563473c39e1528fc91e35990 /drivers/infiniband | |
| parent | IB/hns: Add phy_port for computing GSI/QPN (diff) | |
| download | kernel-qcow2-linux-b280db52cc71a0cb135c2ab9adc0592af6440812.tar.gz kernel-qcow2-linux-b280db52cc71a0cb135c2ab9adc0592af6440812.tar.xz kernel-qcow2-linux-b280db52cc71a0cb135c2ab9adc0592af6440812.zip | |
IB/hns: Change the logic for allocating uar registers
This patch mainly modifies the logic for allocating uar registers.
In HiP06 SoC, HW has 8 group of uar registers for kernel and
user space application. The uar index is assigned as follows:
0 ------ for kernel
1~7 ------ for user space application
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Reviewed-by: Wei Hu <xavier.huwei@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband')
| -rw-r--r-- | drivers/infiniband/hw/hns/hns_roce_pd.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_pd.c b/drivers/infiniband/hw/hns/hns_roce_pd.c index 16271b5bd170..4109f74a4ceb 100644 --- a/drivers/infiniband/hw/hns/hns_roce_pd.c +++ b/drivers/infiniband/hw/hns/hns_roce_pd.c @@ -117,7 +117,9 @@ int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct hns_roce_uar *uar) if (ret == -1) return -ENOMEM; - uar->index = (uar->index - 1) % hr_dev->caps.phy_num_uars + 1; + if (uar->index > 0) + uar->index = (uar->index - 1) % + (hr_dev->caps.phy_num_uars - 1) + 1; res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0); uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index; |