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authorMiao Zhong2018-07-23 14:56:58 +0200
committerWill Deacon2018-07-26 12:34:59 +0200
commit0d535967ac658966c6ade8f82b5799092f7d5441 (patch)
tree95ca13600ccc14a3e342790ec9b480e4ef5cdee8 /drivers/iommu/arm-smmu-v3.c
parentiommu/arm-smmu: Error out only if not enough context interrupts (diff)
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iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register
When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed. Cc: Will Deacon <will.deacon@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Miao Zhong <zhongmiao@hisilicon.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/iommu/arm-smmu-v3.c')
-rw-r--r--drivers/iommu/arm-smmu-v3.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 1d647104bccc..deacc152f09f 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
/* Sync our overflow flag, as we believe we're up to speed */
q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+ writel(q->cons, q->cons_reg);
return IRQ_HANDLED;
}