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| author | Archana Sathyakumar | 2018-02-28 18:27:29 +0100 |
|---|---|---|
| committer | Marc Zyngier | 2018-03-14 12:11:27 +0100 |
| commit | f55c73aef8904ca41ff99618a3a9cf538eb88626 (patch) | |
| tree | 4bbe7e4f39da1968b9ad7106edcd3aeb39b6ff7b /drivers/irqchip/Makefile | |
| parent | irqchip/renesas-irqc: Use wakeup_path i.s.o. explicit clock handling (diff) | |
| download | kernel-qcow2-linux-f55c73aef8904ca41ff99618a3a9cf538eb88626.tar.gz kernel-qcow2-linux-f55c73aef8904ca41ff99618a3a9cf538eb88626.tar.xz kernel-qcow2-linux-f55c73aef8904ca41ff99618a3a9cf538eb88626.zip | |
irqchip/pdc: Add PDC interrupt controller for QCOM SoCs
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functions like handle falling edge or active low which
are not detected at the GIC and handle wakeup interrupts.
The interrupt controller is on an always-on domain for the purpose of
waking up the processor. Only a subset of the processor's interrupts are
routed through the PDC to the GIC. The PDC powers on the processors'
domain, when in low power mode and replays pending interrupts so the GIC
may wake up the processor.
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/Makefile')
| -rw-r--r-- | drivers/irqchip/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index d27e3e3619e0..c35ee5345a53 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -85,3 +85,4 @@ obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o obj-$(CONFIG_ARCH_SYNQUACER) += irq-sni-exiu.o obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o +obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o |