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| author | Thomas Gleixner | 2018-08-24 16:06:42 +0200 |
|---|---|---|
| committer | Thomas Gleixner | 2018-08-24 16:06:42 +0200 |
| commit | 20b420dc42629f115a0339a2474aec419ea32ea0 (patch) | |
| tree | a32fcaa846d4e3daf2daf0ae1826ac2804d5a908 /drivers/irqchip/irq-gic-v3.c | |
| parent | x86/speculation/l1tf: Exempt zeroed PTEs from inversion (diff) | |
| parent | irqchip/gic-v3: Allow interrupt to be configured as wake-up sources (diff) | |
| download | kernel-qcow2-linux-20b420dc42629f115a0339a2474aec419ea32ea0.tar.gz kernel-qcow2-linux-20b420dc42629f115a0339a2474aec419ea32ea0.tar.xz kernel-qcow2-linux-20b420dc42629f115a0339a2474aec419ea32ea0.zip | |
Merge tag 'irqchip-4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates for 4.19, take #2 from Marc Zyngier:
- bcm7038: compilation fix for !SMP
- stm32: fix teardown on probe error
- s3c24xx: fix compilation warning
- renesas-irqc: r8a774a1 support
- tango: chained irq setup simplification
- gic-v3: allow wake-up sources
Diffstat (limited to 'drivers/irqchip/irq-gic-v3.c')
| -rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index e214181b77b7..d5912f1ec884 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -861,7 +861,9 @@ static struct irq_chip gic_chip = { .irq_set_affinity = gic_set_affinity, .irq_get_irqchip_state = gic_irq_get_irqchip_state, .irq_set_irqchip_state = gic_irq_set_irqchip_state, - .flags = IRQCHIP_SET_TYPE_MASKED, + .flags = IRQCHIP_SET_TYPE_MASKED | + IRQCHIP_SKIP_SET_WAKE | + IRQCHIP_MASK_ON_SUSPEND, }; static struct irq_chip gic_eoimode1_chip = { @@ -874,7 +876,9 @@ static struct irq_chip gic_eoimode1_chip = { .irq_get_irqchip_state = gic_irq_get_irqchip_state, .irq_set_irqchip_state = gic_irq_set_irqchip_state, .irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity, - .flags = IRQCHIP_SET_TYPE_MASKED, + .flags = IRQCHIP_SET_TYPE_MASKED | + IRQCHIP_SKIP_SET_WAKE | + IRQCHIP_MASK_ON_SUSPEND, }; #define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer)) |