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author | Linus Torvalds | 2015-11-03 23:40:01 +0100 |
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committer | Linus Torvalds | 2015-11-03 23:40:01 +0100 |
commit | 6aa2fdb87cf01d7746955c600cbac352dc04d451 (patch) | |
tree | 75ba04b2579fafb103dfa049289e7e6b7b3d5bb9 /drivers/irqchip/irq-vf610-mscm-ir.c | |
parent | Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/ke... (diff) | |
parent | Document that IRQ_NONE should be returned when IRQ not actually handled (diff) | |
download | kernel-qcow2-linux-6aa2fdb87cf01d7746955c600cbac352dc04d451.tar.gz kernel-qcow2-linux-6aa2fdb87cf01d7746955c600cbac352dc04d451.tar.xz kernel-qcow2-linux-6aa2fdb87cf01d7746955c600cbac352dc04d451.zip |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"The irq departement delivers:
- Rework the irqdomain core infrastructure to accomodate ACPI based
systems. This is required to support ARM64 without creating
artificial device tree nodes.
- Sanitize the ACPI based ARM GIC initialization by making use of the
new firmware independent irqdomain core
- Further improvements to the generic MSI management
- Generalize the irq migration on CPU hotplug
- Improvements to the threaded interrupt infrastructure
- Allow the migration of "chained" low level interrupt handlers
- Allow optional force masking of interrupts in disable_irq[_nosysnc]
- Support for two new interrupt chips - Sigh!
- A larger set of errata fixes for ARM gicv3
- The usual pile of fixes, updates, improvements and cleanups all
over the place"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (71 commits)
Document that IRQ_NONE should be returned when IRQ not actually handled
PCI/MSI: Allow the MSI domain to be device-specific
PCI: Add per-device MSI domain hook
of/irq: Use the msi-map property to provide device-specific MSI domain
of/irq: Split of_msi_map_rid to reuse msi-map lookup
irqchip/gic-v3-its: Parse new version of msi-parent property
PCI/MSI: Use of_msi_get_domain instead of open-coded "msi-parent" parsing
of/irq: Use of_msi_get_domain instead of open-coded "msi-parent" parsing
of/irq: Add support code for multi-parent version of "msi-parent"
irqchip/gic-v3-its: Add handling of PCI requester id.
PCI/MSI: Add helper function pci_msi_domain_get_msi_rid().
of/irq: Add new function of_msi_map_rid()
Docs: dt: Add PCI MSI map bindings
irqchip/gic-v2m: Add support for multiple MSI frames
irqchip/gic-v3: Fix translation of LPIs after conversion to irq_fwspec
irqchip/mxs: Add Alphascale ASM9260 support
irqchip/mxs: Prepare driver for hardware with different offsets
irqchip/mxs: Panic if ioremap or domain creation fails
irqdomain: Documentation updates
irqdomain/msi: Use fwnode instead of of_node
...
Diffstat (limited to 'drivers/irqchip/irq-vf610-mscm-ir.c')
-rw-r--r-- | drivers/irqchip/irq-vf610-mscm-ir.c | 45 |
1 files changed, 31 insertions, 14 deletions
diff --git a/drivers/irqchip/irq-vf610-mscm-ir.c b/drivers/irqchip/irq-vf610-mscm-ir.c index 2c2255886401..56b5e3cb9de2 100644 --- a/drivers/irqchip/irq-vf610-mscm-ir.c +++ b/drivers/irqchip/irq-vf610-mscm-ir.c @@ -130,35 +130,51 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi { int i; irq_hw_number_t hwirq; - struct of_phandle_args *irq_data = arg; - struct of_phandle_args gic_data; + struct irq_fwspec *fwspec = arg; + struct irq_fwspec parent_fwspec; - if (irq_data->args_count != 2) + if (!irq_domain_get_of_node(domain->parent)) return -EINVAL; - hwirq = irq_data->args[0]; + if (fwspec->param_count != 2) + return -EINVAL; + + hwirq = fwspec->param[0]; for (i = 0; i < nr_irqs; i++) irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, &vf610_mscm_ir_irq_chip, domain->host_data); - gic_data.np = domain->parent->of_node; + parent_fwspec.fwnode = domain->parent->fwnode; if (mscm_ir_data->is_nvic) { - gic_data.args_count = 1; - gic_data.args[0] = irq_data->args[0]; + parent_fwspec.param_count = 1; + parent_fwspec.param[0] = fwspec->param[0]; } else { - gic_data.args_count = 3; - gic_data.args[0] = GIC_SPI; - gic_data.args[1] = irq_data->args[0]; - gic_data.args[2] = irq_data->args[1]; + parent_fwspec.param_count = 3; + parent_fwspec.param[0] = GIC_SPI; + parent_fwspec.param[1] = fwspec->param[0]; + parent_fwspec.param[2] = fwspec->param[1]; } - return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data); + return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, + &parent_fwspec); +} + +static int vf610_mscm_ir_domain_translate(struct irq_domain *d, + struct irq_fwspec *fwspec, + unsigned long *hwirq, + unsigned int *type) +{ + if (WARN_ON(fwspec->param_count < 2)) + return -EINVAL; + *hwirq = fwspec->param[0]; + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; + return 0; } static const struct irq_domain_ops mscm_irq_domain_ops = { - .xlate = irq_domain_xlate_twocell, + .translate = vf610_mscm_ir_domain_translate, .alloc = vf610_mscm_ir_domain_alloc, .free = irq_domain_free_irqs_common, }; @@ -205,7 +221,8 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node, goto out_unmap; } - if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic")) + if (of_device_is_compatible(irq_domain_get_of_node(domain->parent), + "arm,armv7m-nvic")) mscm_ir_data->is_nvic = true; cpu_pm_register_notifier(&mscm_ir_notifier_block); |