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authorEddie Dong2007-05-21 06:28:09 +0200
committerAvi Kivity2007-07-16 11:05:42 +0200
commit2cc51560aed0edb291341089d3475e1fbe8bfd04 (patch)
treee4fd63e0e79613fbb7e475dcdd0ea01c370e02a8 /drivers/kvm/kvm.h
parentKVM: VMX: Cleanup redundant code in MSR set (diff)
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KVM: VMX: Avoid saving and restoring msr_efer on lightweight vmexit
MSR_EFER.LME/LMA bits are automatically save/restored by VMX hardware, KVM only needs to save NX/SCE bits at time of heavy weight VM Exit. But clearing NX bits in host envirnment may cause system hang if the host page table is using EXB bits, thus we leave NX bits as it is. If Host NX=1 and guest NX=0, we can do guest page table EXB bits check before inserting a shadow pte (though no guest is expecting to see this kind of gp fault). If host NX=0, we present guest no Execute-Disable feature to guest, thus no host NX=0, guest NX=1 combination. This patch reduces raw vmexit time by ~27%. Me: fix compile warnings on i386. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm/kvm.h')
-rw-r--r--drivers/kvm/kvm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/kvm/kvm.h b/drivers/kvm/kvm.h
index c252efed49d9..db2bc6f168cd 100644
--- a/drivers/kvm/kvm.h
+++ b/drivers/kvm/kvm.h
@@ -255,6 +255,7 @@ struct kvm_stat {
u32 request_irq_exits;
u32 irq_exits;
u32 light_exits;
+ u32 efer_reload;
};
struct kvm_vcpu {
@@ -289,6 +290,7 @@ struct kvm_vcpu {
u64 ia32_misc_enable_msr;
int nmsrs;
int save_nmsrs;
+ int msr_offset_efer;
#ifdef CONFIG_X86_64
int msr_offset_kernel_gs_base;
#endif