diff options
author | Devin Heitmueller | 2011-03-24 17:44:01 +0100 |
---|---|---|
committer | Mauro Carvalho Chehab | 2011-05-20 12:26:24 +0200 |
commit | 6cacdd46e23826c0591238f5f11b1bfa6490797d (patch) | |
tree | 4c77a8d327a39fc59746a24b7a145814dcb8d544 /drivers/media/dvb/frontends/drxd_firm.h | |
parent | [media] em28xx: add remote control support for PCTV 330e (diff) | |
download | kernel-qcow2-linux-6cacdd46e23826c0591238f5f11b1bfa6490797d.tar.gz kernel-qcow2-linux-6cacdd46e23826c0591238f5f11b1bfa6490797d.tar.xz kernel-qcow2-linux-6cacdd46e23826c0591238f5f11b1bfa6490797d.zip |
[media] drxd: Run lindent across sources
Take a first cleanup pass over the sources to bring them closer to the
Linux coding style.
Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/drxd_firm.h')
-rw-r--r-- | drivers/media/dvb/frontends/drxd_firm.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/media/dvb/frontends/drxd_firm.h b/drivers/media/dvb/frontends/drxd_firm.h index fa704cbf7664..367930a11426 100644 --- a/drivers/media/dvb/frontends/drxd_firm.h +++ b/drivers/media/dvb/frontends/drxd_firm.h @@ -40,7 +40,7 @@ typedef unsigned long u32_t; #define HI_I2C_DELAY 84 #define HI_I2C_BRIDGE_DELAY 750 -#define EQ_TD_TPS_PWR_UNKNOWN 0x00C0 /* Unknown configurations */ +#define EQ_TD_TPS_PWR_UNKNOWN 0x00C0 /* Unknown configurations */ #define EQ_TD_TPS_PWR_QPSK 0x016a #define EQ_TD_TPS_PWR_QAM16_ALPHAN 0x0195 #define EQ_TD_TPS_PWR_QAM16_ALPHA1 0x0195 @@ -65,7 +65,6 @@ typedef unsigned long u32_t; #define DRXD_SCAN_TIMEOUT (650) - #define DRXD_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L) #define DRXD_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L) #define DRXD_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L) @@ -78,7 +77,6 @@ typedef unsigned long u32_t; #define DIFF_TARGET (4) #define DIFF_MARGIN (1) - extern u8_t DRXD_InitAtomicRead[]; extern u8_t DRXD_HiI2cPatch_1[]; extern u8_t DRXD_HiI2cPatch_3[]; @@ -95,7 +93,7 @@ extern u8_t DRXD_InitECA2[]; extern u8_t DRXD_ResetECA2[]; extern u8_t DRXD_ResetECRAM[]; -extern u8_t DRXD_A2_microcode[]; +extern u8_t DRXD_A2_microcode[]; extern u32_t DRXD_A2_microcode_length; extern u8_t DRXD_InitFEB1_1[]; @@ -114,7 +112,7 @@ extern u8_t DRXD_StartDiversityEnd[]; extern u8_t DRXD_DiversityDelay8MHZ[]; extern u8_t DRXD_DiversityDelay6MHZ[]; -extern u8_t DRXD_B1_microcode[]; +extern u8_t DRXD_B1_microcode[]; extern u32_t DRXD_B1_microcode_length; #endif |