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author | Arindam Nath | 2011-05-05 08:49:07 +0200 |
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committer | Chris Ball | 2011-05-25 05:53:48 +0200 |
commit | cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9 (patch) | |
tree | 36288f760fb7556952f8365c3c0cad6b445b04f6 /drivers/mmc/card | |
parent | mmc: sdhci: add support for programmable clock mode (diff) | |
download | kernel-qcow2-linux-cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9.tar.gz kernel-qcow2-linux-cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9.tar.xz kernel-qcow2-linux-cf2b5eea1ea0ff9b3184bc6771bcb93a9fdcd1d9.zip |
mmc: sdhci: add support for retuning mode 1
Host Controller v3.00 can support retuning modes 1,2 or 3 depending on
the bits 46-47 of the Capabilities register. Also, the timer count for
retuning is indicated by bits 40-43 of the same register. We initialize
timer_list for retuning the first time we execute tuning procedure. This
condition is indicated by SDHCI_NEEDS_RETUNING not being set. Since
retuning mode 1 sets a limit of 4MB on the maximum data length, we set
max_blk_count appropriately. Once the tuning timer expires, we set
SDHCI_NEEDS_RETUNING flag, and if the flag is set, we execute tuning
procedure before sending the next command. We need to restore mmc_request
structure after executing retuning procedure since host->mrq is used
inside the procedure to send CMD19. We also disable and re-enable this
flag during suspend and resume respectively, as per the spec v3.00.
Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Reviewed-by: Philip Rakity <prakity@marvell.com>
Tested-by: Philip Rakity <prakity@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/card')
0 files changed, 0 insertions, 0 deletions