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| author | Huang Shijie | 2013-01-25 07:04:07 +0100 |
|---|---|---|
| committer | Artem Bityutskiy | 2013-02-04 09:27:59 +0100 |
| commit | 9ff16f0833806b6b59aaf0cc158fa6e42f24d7e4 (patch) | |
| tree | 179db9e57e721cb0c779b97bbfc9d7a6db8c27dc /drivers/mtd/nand/gpmi-nand/bch-regs.h | |
| parent | mtd: devices: elm: Removes <xx> literals in elm DT node (diff) | |
| download | kernel-qcow2-linux-9ff16f0833806b6b59aaf0cc158fa6e42f24d7e4.tar.gz kernel-qcow2-linux-9ff16f0833806b6b59aaf0cc158fa6e42f24d7e4.tar.xz kernel-qcow2-linux-9ff16f0833806b6b59aaf0cc158fa6e42f24d7e4.zip | |
mtd: gpmi: set the Golois Field bit for mx6q's BCH
The GF13 can be only used in the following case:
The ECC data chunk is less then 1K bytes.
In mx23/mx28, the ecc data chunk is 512 bytes. So it is okay.
But in mx6q, we begin to use some large nand chip whose ecc
data chunk maybe 1K bytes long. So when the data chunk is 1K bytes,
we have to use the GF14.
This patch sets the Golois Field bit when the GF14 is needed.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Diffstat (limited to 'drivers/mtd/nand/gpmi-nand/bch-regs.h')
| -rw-r--r-- | drivers/mtd/nand/gpmi-nand/bch-regs.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/bch-regs.h b/drivers/mtd/nand/gpmi-nand/bch-regs.h index d67bca5174bc..588f5374047c 100644 --- a/drivers/mtd/nand/gpmi-nand/bch-regs.h +++ b/drivers/mtd/nand/gpmi-nand/bch-regs.h @@ -61,6 +61,16 @@ & BM_BCH_FLASH0LAYOUT0_ECC0) \ ) +#define MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14 10 +#define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14 \ + (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) +#define BF_BCH_FLASH0LAYOUT0_GF(v, x) \ + ((GPMI_IS_MX6Q(x) && ((v) == 14)) \ + ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) \ + & MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14) \ + : 0 \ + ) + #define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0 #define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \ (0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE) @@ -93,6 +103,16 @@ & BM_BCH_FLASH0LAYOUT1_ECCN) \ ) +#define MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14 10 +#define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14 \ + (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) +#define BF_BCH_FLASH0LAYOUT1_GF(v, x) \ + ((GPMI_IS_MX6Q(x) && ((v) == 14)) \ + ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) \ + & MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14) \ + : 0 \ + ) + #define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0 #define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \ (0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE) |