diff options
| author | Huang Shijie | 2012-09-13 08:57:56 +0200 |
|---|---|---|
| committer | David Woodhouse | 2012-09-29 16:55:18 +0200 |
| commit | d37e02d8f3a892b57738f1c1431779d5939214d1 (patch) | |
| tree | fde851a10fb36607c90a9abd992d3b18cb7a2e8a /drivers/mtd/nand/gpmi-nand/gpmi-regs.h | |
| parent | mtd: gpmi: do not get the clock frequency in gpmi_begin() (diff) | |
| download | kernel-qcow2-linux-d37e02d8f3a892b57738f1c1431779d5939214d1.tar.gz kernel-qcow2-linux-d37e02d8f3a892b57738f1c1431779d5939214d1.tar.xz kernel-qcow2-linux-d37e02d8f3a892b57738f1c1431779d5939214d1.zip | |
mtd: gpmi: add a new field for HW_GPMI_CTRL1
add the WRN_DLY_SEL field for HW_GPMI_CTRL1.
This field is used as delay for gpmi write strobe.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/gpmi-nand/gpmi-regs.h')
| -rw-r--r-- | drivers/mtd/nand/gpmi-nand/gpmi-regs.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h index 8994e201924c..53397cc290fc 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h +++ b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h @@ -108,6 +108,15 @@ #define HW_GPMI_CTRL1_CLR 0x00000068 #define HW_GPMI_CTRL1_TOG 0x0000006c +#define BP_GPMI_CTRL1_WRN_DLY_SEL 22 +#define BM_GPMI_CTRL1_WRN_DLY_SEL (0x3 << BP_GPMI_CTRL1_WRN_DLY_SEL) +#define BF_GPMI_CTRL1_WRN_DLY_SEL(v) \ + (((v) << BP_GPMI_CTRL1_WRN_DLY_SEL) & BM_GPMI_CTRL1_WRN_DLY_SEL) +#define BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS 0x0 +#define BV_GPMI_CTRL1_WRN_DLY_SEL_6_TO_10NS 0x1 +#define BV_GPMI_CTRL1_WRN_DLY_SEL_7_TO_12NS 0x2 +#define BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY 0x3 + #define BM_GPMI_CTRL1_BCH_MODE (1 << 18) #define BP_GPMI_CTRL1_DLL_ENABLE 17 |