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| author | Pekon Gupta | 2014-03-03 11:08:32 +0100 |
|---|---|---|
| committer | Brian Norris | 2014-03-20 10:55:28 +0100 |
| commit | 16e69322c521c44e1c95c744fd1cca23549aa103 (patch) | |
| tree | 5eb2d0fe58b9e21c5efd168a993cb8062a0ed398 /drivers/mtd/nand/omap2.c | |
| parent | mtd: nand: omap: ecc.hwctl: refactor omap_enable_hwecc_bch for ECC related GP... (diff) | |
| download | kernel-qcow2-linux-16e69322c521c44e1c95c744fd1cca23549aa103.tar.gz kernel-qcow2-linux-16e69322c521c44e1c95c744fd1cca23549aa103.tar.xz kernel-qcow2-linux-16e69322c521c44e1c95c744fd1cca23549aa103.zip | |
mtd: nand: omap: ecc.hwctl: clean omap_enable_hwecc_bch for redundant ECC configs
This patch
- refactors GPMC configurations based on ecc-scheme
- removed dependency on is_elm_present() flag, which is implicitely
taken care by selecting appropriate ecc-scheme
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/omap2.c')
| -rw-r--r-- | drivers/mtd/nand/omap2.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index cabc4b67041c..9962380dbe9a 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1053,7 +1053,7 @@ static int omap_dev_ready(struct mtd_info *mtd) */ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) { - int nerrors; + unsigned int bch_type; unsigned int dev_width, nsectors; struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd); @@ -1062,20 +1062,11 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) u32 val, wr_mode; unsigned int ecc_size1, ecc_size0; - /* Perform ecc calculation on 512-byte sector */ - nsectors = 1; - - /* Update number of error correction */ - nerrors = info->nand.ecc.strength; - - /* Multi sector reading/writing for NAND flash with page size < 4096 */ - if (info->is_elm_used && (mtd->writesize <= 4096)) { - /* Perform ecc calculation for one page (< 4096) */ - nsectors = info->nand.ecc.steps; - } /* GPMC configurations for calculating ECC */ switch (ecc_opt) { case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: + bch_type = 0; + nsectors = 1; if (mode == NAND_ECC_READ) { wr_mode = BCH_WRAPMODE_6; ecc_size0 = BCH_ECC_SIZE0; @@ -1087,6 +1078,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) } break; case OMAP_ECC_BCH4_CODE_HW: + bch_type = 0; + nsectors = chip->ecc.steps; if (mode == NAND_ECC_READ) { wr_mode = BCH_WRAPMODE_1; ecc_size0 = BCH4R_ECC_SIZE0; @@ -1098,6 +1091,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) } break; case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW: + bch_type = 1; + nsectors = 1; if (mode == NAND_ECC_READ) { wr_mode = BCH_WRAPMODE_6; ecc_size0 = BCH_ECC_SIZE0; @@ -1109,6 +1104,8 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) } break; case OMAP_ECC_BCH8_CODE_HW: + bch_type = 1; + nsectors = chip->ecc.steps; if (mode == NAND_ECC_READ) { wr_mode = BCH_WRAPMODE_1; ecc_size0 = BCH8R_ECC_SIZE0; @@ -1133,7 +1130,7 @@ static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode) /* BCH configuration */ val = ((1 << 16) | /* enable BCH */ - (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */ + (bch_type << 12) | /* BCH4/BCH8/BCH16 */ (wr_mode << 8) | /* wrap mode */ (dev_width << 7) | /* bus width */ (((nsectors-1) & 0x7) << 4) | /* number of sectors */ |