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| author | Linus Torvalds | 2019-06-24 15:23:55 +0200 |
|---|---|---|
| committer | Linus Torvalds | 2019-06-24 15:23:55 +0200 |
| commit | 39071cf828b42fa62336849dc910d7b74c905698 (patch) | |
| tree | 7cfa647e58d6d8b1474eefc89d062af657de92f4 /drivers/mtd/nand | |
| parent | Merge tag 'powerpc-5.2-6' of git://git.kernel.org/pub/scm/linux/kernel/git/po... (diff) | |
| parent | mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes (diff) | |
| download | kernel-qcow2-linux-39071cf828b42fa62336849dc910d7b74c905698.tar.gz kernel-qcow2-linux-39071cf828b42fa62336849dc910d7b74c905698.tar.xz kernel-qcow2-linux-39071cf828b42fa62336849dc910d7b74c905698.zip | |
Merge tag 'mtd/fixes-for-5.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull mtd fixes from Miquel Raynal:
- Set the raw NAND number of targets to the right value
- Fix a bug uncovered by a recent patch on Spansion SPI-NOR flashes
* tag 'mtd/fixes-for-5.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux:
mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes
mtd: rawnand: initialize ntargets with maxchips
Diffstat (limited to 'drivers/mtd/nand')
| -rw-r--r-- | drivers/mtd/nand/raw/nand_base.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index b5b68aa16eb3..6eb131292eb2 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4662,7 +4662,6 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type) memorg = nanddev_get_memorg(&chip->base); memorg->planes_per_lun = 1; memorg->luns_per_target = 1; - memorg->ntargets = 1; /* * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) @@ -5027,6 +5026,8 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, if (ret) return ret; + memorg->ntargets = maxchips; + /* Read the flash type */ ret = nand_detect(chip, table); if (ret) { |