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| author | Brian Norris | 2015-09-01 21:57:09 +0200 |
|---|---|---|
| committer | Brian Norris | 2015-10-14 03:22:52 +0200 |
| commit | f0d2448e9a76db8482e716a067ba5abc713ed981 (patch) | |
| tree | b21ad95571a4aaf83ac0ccde1b9294e08d68b8ca /drivers/mtd/spi-nor/spi-nor.c | |
| parent | mtd: spi-nor: add SPI NOR manufacturer IDs (diff) | |
| download | kernel-qcow2-linux-f0d2448e9a76db8482e716a067ba5abc713ed981.tar.gz kernel-qcow2-linux-f0d2448e9a76db8482e716a067ba5abc713ed981.tar.xz kernel-qcow2-linux-f0d2448e9a76db8482e716a067ba5abc713ed981.zip | |
mtd: spi-nor: use SNOR_MFR_* instead of CFI_MFR_*
No functional change, just cosmetic.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/spi-nor/spi-nor.c')
| -rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 0ddf63c22bfb..d356a1f98c42 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -18,7 +18,6 @@ #include <linux/math64.h> #include <linux/sizes.h> -#include <linux/mtd/cfi.h> #include <linux/mtd/mtd.h> #include <linux/of_platform.h> #include <linux/spi/flash.h> @@ -191,11 +190,11 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, u8 cmd; switch (JEDEC_MFR(info)) { - case CFI_MFR_ST: /* Micron, actually */ + case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; - case CFI_MFR_MACRONIX: - case 0xEF /* winbond */: + case SNOR_MFR_MACRONIX: + case SNOR_MFR_WINBOND: if (need_wren) write_enable(nor); @@ -998,14 +997,14 @@ static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info) int status; switch (JEDEC_MFR(info)) { - case CFI_MFR_MACRONIX: + case SNOR_MFR_MACRONIX: status = macronix_quad_enable(nor); if (status) { dev_err(nor->dev, "Macronix quad-read not enabled\n"); return -EINVAL; } return status; - case CFI_MFR_ST: + case SNOR_MFR_MICRON: status = micron_quad_enable(nor); if (status) { dev_err(nor->dev, "Micron quad-read not enabled\n"); @@ -1085,9 +1084,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) * up with the software protection bits set */ - if (JEDEC_MFR(info) == CFI_MFR_ATMEL || - JEDEC_MFR(info) == CFI_MFR_INTEL || - JEDEC_MFR(info) == CFI_MFR_SST) { + if (JEDEC_MFR(info) == SNOR_MFR_ATMEL || + JEDEC_MFR(info) == SNOR_MFR_INTEL || + JEDEC_MFR(info) == SNOR_MFR_SST) { write_enable(nor); write_sr(nor, 0); } @@ -1102,8 +1101,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) mtd->_erase = spi_nor_erase; mtd->_read = spi_nor_read; - /* nor protection support for STmicro chips */ - if (JEDEC_MFR(info) == CFI_MFR_ST) { + /* NOR protection support for STmicro/Micron chips */ + if (JEDEC_MFR(info) == SNOR_MFR_MICRON) { nor->flash_lock = stm_lock; nor->flash_unlock = stm_unlock; } @@ -1197,7 +1196,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) else if (mtd->size > 0x1000000) { /* enable 4-byte addressing if the device exceeds 16MiB */ nor->addr_width = 4; - if (JEDEC_MFR(info) == CFI_MFR_AMD) { + if (JEDEC_MFR(info) == SNOR_MFR_SPANSION) { /* Dedicated 4-byte command set */ switch (nor->flash_read) { case SPI_NOR_QUAD: |