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| author | Liu Xiang | 2019-06-24 18:00:46 +0200 |
|---|---|---|
| committer | Tudor Ambarus | 2019-06-27 16:13:22 +0200 |
| commit | cf580a92400584a48f59e07c372a635160340864 (patch) | |
| tree | 1c285fbe68df56935a33648020834ab20de0be67 /drivers/mtd | |
| parent | mtd: spi-nor: intel-spi: Convert to use SPDX identifier (diff) | |
| download | kernel-qcow2-linux-cf580a92400584a48f59e07c372a635160340864.tar.gz kernel-qcow2-linux-cf580a92400584a48f59e07c372a635160340864.tar.xz kernel-qcow2-linux-cf580a92400584a48f59e07c372a635160340864.zip | |
mtd: spi-nor: fix nor->addr_width when its value configured from SFDP does not match the actual width
IS25LP256 gets BFPT_DWORD1_ADDRESS_BYTES_3_ONLY from BFPT table for
address width. But in actual fact the flash can support 4-byte address.
Use a post bfpt fixup hook to overwrite the address width advertised by
the BFPT.
Signed-off-by: Liu Xiang <liu.xiang6@zte.com.cn>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 9d03fe50533e..e3a28c0f22cb 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1687,6 +1687,28 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor) .flags = SPI_NOR_NO_FR | SPI_S3AN, static int +is25lp256_post_bfpt_fixups(struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header, + const struct sfdp_bfpt *bfpt, + struct spi_nor_flash_parameter *params) +{ + /* + * IS25LP256 supports 4B opcodes, but the BFPT advertises a + * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY address width. + * Overwrite the address width advertised by the BFPT. + */ + if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) == + BFPT_DWORD1_ADDRESS_BYTES_3_ONLY) + nor->addr_width = 4; + + return 0; +} + +static struct spi_nor_fixups is25lp256_fixups = { + .post_bfpt = is25lp256_post_bfpt_fixups, +}; + +static int mx25l25635_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt, @@ -1827,7 +1849,8 @@ static const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ) }, { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_4B_OPCODES) }, + SPI_NOR_4B_OPCODES) + .fixups = &is25lp256_fixups }, { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128, |