diff options
| author | Yaniv Rosner | 2011-06-14 03:34:17 +0200 |
|---|---|---|
| committer | David S. Miller | 2011-06-15 16:56:57 +0200 |
| commit | 6583e33baefbe4dea04999ec91be1a1371cd1528 (patch) | |
| tree | c96ee11e53d20989463ef7a97798f6e3075255a0 /drivers/net/bnx2x/bnx2x_reg.h | |
| parent | bnx2x: Add Warpcore support for 578xx (diff) | |
| download | kernel-qcow2-linux-6583e33baefbe4dea04999ec91be1a1371cd1528.tar.gz kernel-qcow2-linux-6583e33baefbe4dea04999ec91be1a1371cd1528.tar.xz kernel-qcow2-linux-6583e33baefbe4dea04999ec91be1a1371cd1528.zip | |
bnx2x: Add new PHY 54616s
Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@conan.davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_reg.h')
| -rw-r--r-- | drivers/net/bnx2x/bnx2x_reg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h index 23c89a863a58..bf43b9b16d8b 100644 --- a/drivers/net/bnx2x/bnx2x_reg.h +++ b/drivers/net/bnx2x/bnx2x_reg.h @@ -5420,7 +5420,9 @@ #define EMAC_LED_OVERRIDE (1L<<0) #define EMAC_LED_TRAFFIC (1L<<6) #define EMAC_MDIO_COMM_COMMAND_ADDRESS (0L<<26) +#define EMAC_MDIO_COMM_COMMAND_READ_22 (2L<<26) #define EMAC_MDIO_COMM_COMMAND_READ_45 (3L<<26) +#define EMAC_MDIO_COMM_COMMAND_WRITE_22 (1L<<26) #define EMAC_MDIO_COMM_COMMAND_WRITE_45 (1L<<26) #define EMAC_MDIO_COMM_DATA (0xffffL<<0) #define EMAC_MDIO_COMM_START_BUSY (1L<<29) @@ -6737,6 +6739,16 @@ Theotherbitsarereservedandshouldbezero*/ #define DIGITAL5_ACTUAL_SPEED_TX_MASK 0x003f +/* 54616s */ +#define MDIO_REG_INTR_STATUS 0x1a +#define MDIO_REG_INTR_MASK 0x1b +#define MDIO_REG_INTR_MASK_LINK_STATUS (0x1 << 1) +#define MDIO_REG_GPHY_SHADOW 0x1c +#define MDIO_REG_GPHY_SHADOW_LED_SEL2 (0x0e << 10) +#define MDIO_REG_GPHY_SHADOW_WR_ENA (0x1 << 15) +#define MDIO_REG_GPHY_SHADOW_AUTO_DET_MED (0x1e << 10) +#define MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD (0x1 << 8) + #define IGU_FUNC_BASE 0x0400 #define IGU_ADDR_MSIX 0x0000 |