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authorRasmus Villemoes2019-06-04 09:34:30 +0200
committerDavid S. Miller2019-06-05 05:07:57 +0200
commitce91c45321e81c7ec1a41555c05a1fb14acfc076 (patch)
tree180e5b217c550223e76aace3c7e9a9e36ba5971f /drivers/net/dsa/mv88e6xxx/chip.h
parentnet: dsa: mv88e6xxx: implement port_set_speed for mv88e6250 (diff)
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net: dsa: mv88e6xxx: implement port_link_state for mv88e6250
The mv88e6250 has a rather different way of reporting the link, speed and duplex status. A simple difference is that the link bit is bit 12 rather than bit 11 of the port status register. It gets more complicated for speed and duplex, which do not have separate fields. Instead, there's a four-bit PortMode field, and decoding that depends on whether it's a phy or mii port. For the phy ports, only four of the 16 values have defined meaning; the rest are called "reserved", so returning {SPEED,DUPLEX}_UNKNOWN seems reasonable. For the mii ports, most possible values are documented (0x3 and 0x5 are reserved), but I'm unable to make sense of them all. Since the bits simply reflect the Px_MODE[3:0] configuration pins, just support the subset that I'm certain about. Support for other setups can be added later. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/chip.h')
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