diff options
author | Raghu Vatsavayi | 2016-06-15 01:54:51 +0200 |
---|---|---|
committer | David S. Miller | 2016-06-16 06:44:32 +0200 |
commit | 6a885b60dad25bb687fe779fafe90a24886022f8 (patch) | |
tree | 41b098da826ba5f929e956e4f0d4f01133aff036 /drivers/net/ethernet/cavium/liquidio/octeon_iq.h | |
parent | liquidio: Replace ifidx for FW commands (diff) | |
download | kernel-qcow2-linux-6a885b60dad25bb687fe779fafe90a24886022f8.tar.gz kernel-qcow2-linux-6a885b60dad25bb687fe779fafe90a24886022f8.tar.xz kernel-qcow2-linux-6a885b60dad25bb687fe779fafe90a24886022f8.zip |
liquidio: Introduce new octeon2/3 header
Added support for new instruction header for octeon2/octeon3(ih) and
corresponding changes.
Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com>
Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com>
Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com>
Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/cavium/liquidio/octeon_iq.h')
-rw-r--r-- | drivers/net/ethernet/cavium/liquidio/octeon_iq.h | 41 |
1 files changed, 37 insertions, 4 deletions
diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_iq.h b/drivers/net/ethernet/cavium/liquidio/octeon_iq.h index 14c5d70486d3..513f8a068179 100644 --- a/drivers/net/ethernet/cavium/liquidio/octeon_iq.h +++ b/drivers/net/ethernet/cavium/liquidio/octeon_iq.h @@ -75,6 +75,8 @@ struct oct_iq_stats { * a Octeon device has one such structure to represent it. */ struct octeon_instr_queue { + struct octeon_device *oct_dev; + /** A spinlock to protect access to the input ring. */ spinlock_t lock; @@ -183,12 +185,12 @@ struct octeon_instr_32B { /** 64-byte instruction format. * Format of instruction for a 64-byte mode input queue. */ -struct octeon_instr_64B { +struct octeon_instr2_64B { /** Pointer where the input data is available. */ u64 dptr; /** Instruction Header. */ - u64 ih; + u64 ih2; /** Input Request Header. */ u64 irh; @@ -205,10 +207,40 @@ struct octeon_instr_64B { u64 rptr; u64 reserved; +}; + +struct octeon_instr3_64B { + /** Pointer where the input data is available. */ + u64 dptr; + + /** Instruction Header. */ + u64 ih3; + + /** Instruction Header. */ + u64 pki_ih3; + + /** Input Request Header. */ + u64 irh; + + /** opcode/subcode specific parameters */ + u64 ossp[2]; + + /** Return Data Parameters */ + u64 rdp; + + /** Pointer where the response for a RAW mode packet will be written + * by Octeon. + */ + u64 rptr; }; -#define OCT_64B_INSTR_SIZE (sizeof(struct octeon_instr_64B)) +union octeon_instr_64B { + struct octeon_instr2_64B cmd2; + struct octeon_instr3_64B cmd3; +}; + +#define OCT_64B_INSTR_SIZE (sizeof(union octeon_instr_64B)) /** The size of each buffer in soft command buffer pool */ @@ -221,7 +253,8 @@ struct octeon_soft_command { u32 size; /** Command and return status */ - struct octeon_instr_64B cmd; + union octeon_instr_64B cmd; + #define COMPLETION_WORD_INIT 0xffffffffffffffffULL u64 *status_word; |