diff options
| author | Yunsheng Lin | 2017-09-20 12:52:58 +0200 |
|---|---|---|
| committer | David S. Miller | 2017-09-21 01:15:40 +0200 |
| commit | c5795c5308af81568d1573598716091120c85a38 (patch) | |
| tree | 339c6e81acd81f3dd57be00d43a7fe3a870c36c7 /drivers/net/ethernet/hisilicon/hns3/hnae3.h | |
| parent | net: hns3: Fix for setting rss_size incorrectly (diff) | |
| download | kernel-qcow2-linux-c5795c5308af81568d1573598716091120c85a38.tar.gz kernel-qcow2-linux-c5795c5308af81568d1573598716091120c85a38.tar.xz kernel-qcow2-linux-c5795c5308af81568d1573598716091120c85a38.zip | |
net: hns3: Fix for pri to tc mapping in TM
Current mapping between pri and tc is one to one,
so user can't map multi priorities to the same tc.
This patch changes the mapping to many to one.
Fixes: 848440544b41f ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver")
Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hnae3.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index ad685f5aa6d1..1a01cadfe5f3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -376,12 +376,12 @@ struct hnae3_ae_algo { struct hnae3_tc_info { u16 tqp_offset; /* TQP offset from base TQP */ u16 tqp_count; /* Total TQPs */ - u8 up; /* user priority */ u8 tc; /* TC index */ bool enable; /* If this TC is enable or not */ }; #define HNAE3_MAX_TC 8 +#define HNAE3_MAX_USER_PRIO 8 struct hnae3_knic_private_info { struct net_device *netdev; /* Set by KNIC client when init instance */ u16 rss_size; /* Allocated RSS queues */ @@ -389,6 +389,7 @@ struct hnae3_knic_private_info { u16 num_desc; u8 num_tc; /* Total number of enabled TCs */ + u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ u16 num_tqps; /* total number of TQPs in this handle */ |