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| author | Jian Shen | 2018-08-03 11:56:30 +0200 |
|---|---|---|
| committer | David S. Miller | 2018-08-03 18:53:24 +0200 |
| commit | 07acf909ee33983fe22334446dd5c2adf0fdca26 (patch) | |
| tree | 2b5de293d1cffb3770c0ff6b4e3fd85fdab715af /drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | |
| parent | rxrpc: Reuse SKCIPHER_REQUEST_ON_STACK buffer (diff) | |
| download | kernel-qcow2-linux-07acf909ee33983fe22334446dd5c2adf0fdca26.tar.gz kernel-qcow2-linux-07acf909ee33983fe22334446dd5c2adf0fdca26.tar.xz kernel-qcow2-linux-07acf909ee33983fe22334446dd5c2adf0fdca26.zip | |
net: hns3: Fix MSIX allocation issue for VF
The msix number for vf is different, depends on the max vf number.
Futherly if the vf supports roce, the offset of msix is not fixed.
It's incorrect to fix the msix number to 33. This patch fixes it by
querying the msix number from firmware, and adjusting it with roce
support.
Fixes: e2cb1dec9779 ("net: hns3: Add HNS3 VF HCL(Hardware Compatibility Layer) Support")
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h index 0656e8e5c5f0..b23ba171473c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h @@ -12,7 +12,6 @@ #define HCLGEVF_MOD_VERSION "1.0" #define HCLGEVF_DRIVER_NAME "hclgevf" -#define HCLGEVF_ROCEE_VECTOR_NUM 0 #define HCLGEVF_MISC_VECTOR_NUM 0 #define HCLGEVF_INVALID_VPORT 0xffff @@ -150,6 +149,9 @@ struct hclgevf_dev { u16 num_msi; u16 num_msi_left; u16 num_msi_used; + u16 num_roce_msix; /* Num of roce vectors for this VF */ + u16 roce_base_msix_offset; + int roce_base_vector; u32 base_msi_vector; u16 *vector_status; int *vector_irq; |