summaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
diff options
context:
space:
mode:
authorMark Rustad2016-01-26 01:32:10 +0100
committerJeff Kirsher2016-04-05 02:44:31 +0200
commitafdc71e4d6dc46d0f5bea7461ce356e6056f5ba8 (patch)
tree762152482738d6dced1bf36246cba59f3b57365a /drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
parentixgbevf: Add support for generic Tx checksums (diff)
downloadkernel-qcow2-linux-afdc71e4d6dc46d0f5bea7461ce356e6056f5ba8.tar.gz
kernel-qcow2-linux-afdc71e4d6dc46d0f5bea7461ce356e6056f5ba8.tar.xz
kernel-qcow2-linux-afdc71e4d6dc46d0f5bea7461ce356e6056f5ba8.zip
ixgbe: Fix flow control for Xeon D KR backplane
Xeon D KR backplane is different from other backplanes, in that we can't use auto-negotiation to determine the mode. Instead, use whatever the user configured. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_common.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 64045053e874..8c7e78b21c4e 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -1,7 +1,7 @@
/*******************************************************************************
Intel 10 Gigabit PCI Express Linux driver
- Copyright(c) 1999 - 2015 Intel Corporation.
+ Copyright(c) 1999 - 2016 Intel Corporation.
This program is free software; you can redistribute it and/or modify it
under the terms and conditions of the GNU General Public License,
@@ -111,12 +111,12 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
}
/**
- * ixgbe_setup_fc - Set up flow control
+ * ixgbe_setup_fc_generic - Set up flow control
* @hw: pointer to hardware structure
*
* Called at init time to set up flow control.
**/
-static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
+s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)
{
s32 ret_val = 0;
u32 reg = 0, reg_bp = 0;
@@ -296,7 +296,7 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)
IXGBE_WRITE_FLUSH(hw);
/* Setup flow control */
- ret_val = ixgbe_setup_fc(hw);
+ ret_val = hw->mac.ops.setup_fc(hw);
if (ret_val)
return ret_val;