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| author | Jacob Keller | 2016-04-14 01:08:22 +0200 |
|---|---|---|
| committer | Jeff Kirsher | 2016-04-25 13:15:11 +0200 |
| commit | b4f47a483045a6e6b31be8ade76cdfef7091f18b (patch) | |
| tree | 92232ac7d9c844a7bb65c15fb9c4b7cadae5a079 /drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c | |
| parent | ixgbe: Add work around for empty SFP+ cage crosstalk (diff) | |
| download | kernel-qcow2-linux-b4f47a483045a6e6b31be8ade76cdfef7091f18b.tar.gz kernel-qcow2-linux-b4f47a483045a6e6b31be8ade76cdfef7091f18b.tar.xz kernel-qcow2-linux-b4f47a483045a6e6b31be8ade76cdfef7091f18b.zip | |
ixgbe: use BIT() macro
Several areas of ixgbe were written before widespread usage of the
BIT(n) macro. With the impending release of GCC 6 and its associated new
warnings, some usages such as (1 << 31) have been noted within the ixgbe
driver source. Fix these wholesale and prevent future issues by simply
using BIT macro instead of hand coded bit shifts.
Also fix a few shifts that are shifting values into place by using the
'u' prefix to indicate unsigned. It doesn't strictly matter in these
cases because we're not shifting by too large a value, but these are all
unsigned values and should be indicated as such.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c index d3ba63f9ad37..b79e93a5b699 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c @@ -210,7 +210,7 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en) /* Configure PFC Tx thresholds per TC */ for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { - if (!(pfc_en & (1 << i))) { + if (!(pfc_en & BIT(i))) { IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); continue; |