diff options
| author | Don Skidmore | 2015-06-10 02:15:01 +0200 |
|---|---|---|
| committer | Jeff Kirsher | 2015-06-10 02:15:01 +0200 |
| commit | 9a900ecaac65ecc487a8a223df80fe0f09d18080 (patch) | |
| tree | ba615d279d521a9ca15dedf1b48e6bdb8e9ba301 /drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | |
| parent | s390/bpf: implement bpf_tail_call() helper (diff) | |
| download | kernel-qcow2-linux-9a900ecaac65ecc487a8a223df80fe0f09d18080.tar.gz kernel-qcow2-linux-9a900ecaac65ecc487a8a223df80fe0f09d18080.tar.xz kernel-qcow2-linux-9a900ecaac65ecc487a8a223df80fe0f09d18080.zip | |
ixgbe: add array of MAC type dependent values
Some of the register addresses and format where unfortunately changed
between MAC types. To get around this we add a const u32 *mvals pointer
to the ixgbe_hw struct to point to an array of mac-type-dependent
values. These can include register offsets, masks, whatever can be in
a u32. When the ixgbe_hw struct is initialized, a pointer to the
appropriate array must be set.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c index b0236985e915..aaf5d1aff47f 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c @@ -90,7 +90,7 @@ static s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw) eeprom->semaphore_delay = 10; eeprom->type = ixgbe_flash; - eec = IXGBE_READ_REG(hw, IXGBE_EEC); + eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >> IXGBE_EEC_SIZE_SHIFT); eeprom->word_size = 1 << (eeprom_size + @@ -1541,6 +1541,14 @@ static struct ixgbe_phy_operations phy_ops_X550EM_x = { .setup_link = NULL, /* defined later */ }; +static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(X550) +}; + +static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(X550EM_x) +}; + struct ixgbe_info ixgbe_X550_info = { .mac = ixgbe_mac_X550, .get_invariants = &ixgbe_get_invariants_X540, @@ -1548,6 +1556,7 @@ struct ixgbe_info ixgbe_X550_info = { .eeprom_ops = &eeprom_ops_X550, .phy_ops = &phy_ops_X550, .mbx_ops = &mbx_ops_generic, + .mvals = ixgbe_mvals_X550, }; struct ixgbe_info ixgbe_X550EM_x_info = { @@ -1557,4 +1566,5 @@ struct ixgbe_info ixgbe_X550EM_x_info = { .eeprom_ops = &eeprom_ops_X550EM_x, .phy_ops = &phy_ops_X550EM_x, .mbx_ops = &mbx_ops_generic, + .mvals = ixgbe_mvals_X550EM_x, }; |