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| author | Don Skidmore | 2014-01-16 11:30:09 +0100 |
|---|---|---|
| committer | David S. Miller | 2014-01-17 00:34:25 +0100 |
| commit | de02decb33e176c1befc4d0f19c11a334b31f1ea (patch) | |
| tree | 1cb1bf957abbacb14f89c65e629f89bbb4c8a36b /drivers/net/ethernet/intel/ixgbevf/defines.h | |
| parent | ixgbevf: Convert ring storage form pointer to an array to array of pointers (diff) | |
| download | kernel-qcow2-linux-de02decb33e176c1befc4d0f19c11a334b31f1ea.tar.gz kernel-qcow2-linux-de02decb33e176c1befc4d0f19c11a334b31f1ea.tar.xz kernel-qcow2-linux-de02decb33e176c1befc4d0f19c11a334b31f1ea.zip | |
ixgbevf: create function for all of ring init
This patch creates new functions for ring initialization,
ixgbevf_configure_tx_ring() and ixgbevf_configure_rx_ring(). The work done
in these function previously was spread between several other functions and
this change should hopefully lead to greater readability and make the code
more like ixgbe. This patch also moves the placement of some older functions
to avoid having to write prototypes. It also promotes a couple of debug
messages to errors.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbevf/defines.h')
| -rw-r--r-- | drivers/net/ethernet/intel/ixgbevf/defines.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ixgbevf/defines.h b/drivers/net/ethernet/intel/ixgbevf/defines.h index 3147795bd135..5426b2dee6a6 100644 --- a/drivers/net/ethernet/intel/ixgbevf/defines.h +++ b/drivers/net/ethernet/intel/ixgbevf/defines.h @@ -277,4 +277,21 @@ struct ixgbe_adv_tx_context_desc { #define IXGBE_ERR_RESET_FAILED -2 #define IXGBE_ERR_INVALID_ARGUMENT -3 +/* Transmit Config masks */ +#define IXGBE_TXDCTL_ENABLE 0x02000000 /* Ena specific Tx Queue */ +#define IXGBE_TXDCTL_SWFLSH 0x04000000 /* Tx Desc. wr-bk flushing */ +#define IXGBE_TXDCTL_WTHRESH_SHIFT 16 /* shift to WTHRESH bits */ + +#define IXGBE_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* Rx Desc enable */ +#define IXGBE_DCA_RXCTRL_HEAD_DCA_EN (1 << 6) /* Rx Desc header ena */ +#define IXGBE_DCA_RXCTRL_DATA_DCA_EN (1 << 7) /* Rx Desc payload ena */ +#define IXGBE_DCA_RXCTRL_DESC_RRO_EN (1 << 9) /* Rx rd Desc Relax Order */ +#define IXGBE_DCA_RXCTRL_DATA_WRO_EN (1 << 13) /* Rx wr data Relax Order */ +#define IXGBE_DCA_RXCTRL_HEAD_WRO_EN (1 << 15) /* Rx wr header RO */ + +#define IXGBE_DCA_TXCTRL_DESC_DCA_EN (1 << 5) /* DCA Tx Desc enable */ +#define IXGBE_DCA_TXCTRL_DESC_RRO_EN (1 << 9) /* Tx rd Desc Relax Order */ +#define IXGBE_DCA_TXCTRL_DESC_WRO_EN (1 << 11) /* Tx Desc writeback RO bit */ +#define IXGBE_DCA_TXCTRL_DATA_RRO_EN (1 << 13) /* Tx rd data Relax Order */ + #endif /* _IXGBEVF_DEFINES_H_ */ |