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| author | Tariq Toukan | 2018-04-04 11:54:23 +0200 |
|---|---|---|
| committer | Saeed Mahameed | 2018-05-25 23:11:00 +0200 |
| commit | 3a2f70331226c140e5aa27ee6bbe2a5c618acb4c (patch) | |
| tree | 46ae6213a04598f4a8df06ef920bf88d31207615 /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
| parent | net/mlx5i: Use compilation flag in IPOIB header (diff) | |
| download | kernel-qcow2-linux-3a2f70331226c140e5aa27ee6bbe2a5c618acb4c.tar.gz kernel-qcow2-linux-3a2f70331226c140e5aa27ee6bbe2a5c618acb4c.tar.xz kernel-qcow2-linux-3a2f70331226c140e5aa27ee6bbe2a5c618acb4c.zip | |
net/mlx5: Use order-0 allocations for all WQ types
Complete the transition of all WQ types to use fragmented
order-0 coherent memory instead of high-order allocations.
CQ-WQ already uses order-0.
Here we do the same for cyclic and linked-list WQs.
This allows the driver to load cleanly on systems with a highly
fragmented coherent memory.
Performance tests:
ConnectX-5 100Gbps, CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz
Packet rate of 64B packets, single transmit ring, size 8K.
No degradation is sensed.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 3c0f0a0343fd..9396db54973f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -314,7 +314,7 @@ struct mlx5e_cq { /* control */ struct mlx5_core_dev *mdev; - struct mlx5_frag_wq_ctrl wq_ctrl; + struct mlx5_wq_ctrl wq_ctrl; } ____cacheline_aligned_in_smp; struct mlx5e_tx_wqe_info { |