diff options
| author | Eugenia Emantayev | 2017-05-28 13:06:01 +0200 |
|---|---|---|
| committer | Saeed Mahameed | 2017-07-27 15:40:17 +0200 |
| commit | 4272f9b88db9223216cdf87314f570f6d81295b4 (patch) | |
| tree | 912509390357265f9d69b7c0918053ff0bfffe5e /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
| parent | net/mlx5e: Fix broken disable 1PPS flow (diff) | |
| download | kernel-qcow2-linux-4272f9b88db9223216cdf87314f570f6d81295b4.tar.gz kernel-qcow2-linux-4272f9b88db9223216cdf87314f570f6d81295b4.tar.xz kernel-qcow2-linux-4272f9b88db9223216cdf87314f570f6d81295b4.zip | |
net/mlx5e: Change 1PPS out scheme
In order to fix the drift in 1PPS out need to adjust the next pulse.
On each 1PPS out falling edge driver gets the event, then the event
handler adjusts the next pulse starting time.
Fixes: ee7f12205abc ('net/mlx5e: Implement 1PPS support')
Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index e1b7ddfecd01..d42826f0f0d6 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -266,6 +266,13 @@ struct mlx5e_dcbx { }; #endif +#define MAX_PIN_NUM 8 +struct mlx5e_pps { + u8 pin_caps[MAX_PIN_NUM]; + struct work_struct out_work; + u64 start[MAX_PIN_NUM]; +}; + struct mlx5e_tstamp { rwlock_t lock; struct cyclecounter cycles; @@ -277,7 +284,7 @@ struct mlx5e_tstamp { struct mlx5_core_dev *mdev; struct ptp_clock *ptp; struct ptp_clock_info ptp_info; - u8 *pps_pin_caps; + struct mlx5e_pps pps_info; }; enum { |