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author | Achiad Shochat | 2015-08-04 13:05:40 +0200 |
---|---|---|
committer | David S. Miller | 2015-08-07 07:00:58 +0200 |
commit | 4cbeaff54f00f39493c4251bf115d02e26ac8bf2 (patch) | |
tree | 6a8785365f9e9cf93f09158a445d3e8b3dfd89d7 /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
parent | Merge branch 'cpsw-next' (diff) | |
download | kernel-qcow2-linux-4cbeaff54f00f39493c4251bf115d02e26ac8bf2.tar.gz kernel-qcow2-linux-4cbeaff54f00f39493c4251bf115d02e26ac8bf2.tar.xz kernel-qcow2-linux-4cbeaff54f00f39493c4251bf115d02e26ac8bf2.zip |
net/mlx5e: Unify the RX flow
Generally an RX packet flows through the following objects:
Flow table --> TIR --> RQT --> RQ
Where:
- TIR stands for "Transport Interface Receive", defining the RSS and
LRO paramaters.
- RQT stands for "RQ Table", implementing the RSS indirection table.
- RQ stands for "Receive Queue"
For flows that do not need LRO, nor RSS, the driver made a shortcut to
the above RX flow by pointing to the RQ directly from the TIR, yielding
this flow:
Flow table --> TIR --> RQ
In this commit we remove this shortcut by "inserting" a single-RQ RQT
between the TIR and the RQ, i.e RX packets will reach the same RQ but
will go through an RQT of size 1, pointing to just a single RQ.
This way the RX traffic re-direction to/from the "Drop RQ" will be more
uniform (AKA "one flow"), as it will involve only RQTs re-direction and
no TIRs re-direction.
Signed-off-by: Achiad Shochat <achiad@mellanox.com>
Signed-off-by: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 45f6dc75c0df..af5791296584 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -344,10 +344,10 @@ enum mlx5e_traffic_types { MLX5E_NUM_TT, }; -enum { - MLX5E_RQT_SPREADING = 0, - MLX5E_RQT_DEFAULT_RQ = 1, - MLX5E_NUM_RQT = 2, +enum mlx5e_rqt_ix { + MLX5E_INDIRECTION_RQT, + MLX5E_SINGLE_RQ_RQT, + MLX5E_NUM_RQT, }; struct mlx5e_eth_addr_info { @@ -402,7 +402,7 @@ struct mlx5e_priv { struct mlx5e_channel **channel; u32 tisn[MLX5E_MAX_NUM_TC]; - u32 rqtn; + u32 rqtn[MLX5E_NUM_RQT]; u32 tirn[MLX5E_NUM_TT]; struct mlx5e_flow_table ft; |