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author | Huy Nguyen | 2017-07-18 23:34:51 +0200 |
---|---|---|
committer | Saeed Mahameed | 2017-11-05 05:26:42 +0100 |
commit | fbcb127e89ba8a4ccbec609a27f8d110474044c8 (patch) | |
tree | 2c778a2fd92a9caac04a9d0927b3f65bb62ff2fb /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
parent | net/mlx5e: Add dcbnl dscp to priority support (diff) | |
download | kernel-qcow2-linux-fbcb127e89ba8a4ccbec609a27f8d110474044c8.tar.gz kernel-qcow2-linux-fbcb127e89ba8a4ccbec609a27f8d110474044c8.tar.xz kernel-qcow2-linux-fbcb127e89ba8a4ccbec609a27f8d110474044c8.zip |
net/mlx5e: Support DSCP trust state to Ethernet's IP packet on SQ
If the port is in DSCP trust state, packets are placed in the right
priority queue based on the dscp value. This is done by selecting
the transmit queue based on the dscp of the skb.
Until now select_queue honors priority only from the vlan header.
However that is not sufficient in cases where port trust state is DSCP
mode as packet might not even contain vlan header. Therefore if the port
is in dscp trust state and vport's min inline mode is not NONE,
copy the IP header to the eseg's inline header if the skb has it.
This is done by changing the transmit queue sq's min inline mode to L3.
Note that the min inline mode of sqs that belong to other features such
as xdpsq, icosq are not modified.
Signed-off-by: Huy Nguyen <huyn@mellanox.com>
Reviewed-by: Parav Pandit <parav@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index ab6f0c18850f..fae7b62d173f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -1083,4 +1083,5 @@ void mlx5e_destroy_netdev(struct mlx5e_priv *priv); void mlx5e_build_nic_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params, u16 max_channels); +u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev); #endif /* __MLX5_EN_H__ */ |